標題: Design and realization of a digital multiphase-interleaved VRM controller using FPGA
作者: Wang, Yi-Chung
Tzou, Ying-Yu
電控工程研究所
Institute of Electrical and Control Engineering
關鍵字: VRM;multiphase buck converter;interleaved;synchronous sampling;FPGA digital control;current sharing control
公開日期: 2007
摘要: Voltage Regulator Modules (VRM) are used for low-voltage, high-current dc-dc converters used for high-performance microprocessors and graphic processors. This paper describes the development of a digital PWM controller architecture in applications to multiphase-interleaved VRM. A digital current control technique with interleaved PWM generation and synchronous current sampling has been developed to improve the transient response under large load disturbances. The proposed control scheme for the interleaved multiphase buck converter employs feedback signals of output voltage, output current, and per-phase inductor current. By using a synchronous over-sampling, technique for the detection per-phase inductor current and double-edge PWM modulation technique, the current response can reach a deadbeat performance for step current command. Current sharing control is used to equalize the current of each phase converter under possible parameters mismatch. A computer simulation study has been carried out to illustrate the feasibility and performance of the proposed digital control technique.
URI: http://hdl.handle.net/11536/6235
http://dx.doi.org/10.1109/IECON.2007.4460300
ISBN: 978-1-4244-0783-5
ISSN: 1553-572X
DOI: 10.1109/IECON.2007.4460300
期刊: IECON 2007: 33RD ANNUAL CONFERENCE OF THE IEEE INDUSTRIAL ELECTRONICS SOCIETY, VOLS 1-3, CONFERENCE PROCEEDINGS
起始頁: 1978
結束頁: 1982
Appears in Collections:Conferences Paper


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