完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chao, Mango C. -T. | en_US |
dc.contributor.author | Cheng, Kwang-Ting | en_US |
dc.contributor.author | Wang, Seongmoon | en_US |
dc.contributor.author | Chakradhar, Srimat T. | en_US |
dc.contributor.author | Ei, Wen-Long V. | en_US |
dc.date.accessioned | 2014-12-08T15:07:55Z | - |
dc.date.available | 2014-12-08T15:07:55Z | - |
dc.date.issued | 2007 | en_US |
dc.identifier.isbn | 978-1-4244-1381-2 | en_US |
dc.identifier.issn | 1063-6757 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/6246 | - |
dc.description.abstract | This paper presents a hybrid compaction scheme for test responses containing unknown values, which consists of a space compactor and an unknown-blocking Multiple Input Signature Registers (MISR). The proposed scheme guarantees no coverage loss for the modeled faults. The proposed hybrid scheme can also be tuned to observe any user-specified percentage of responses for controlling the coverage loss for un-modeled faults. The experimental results demonstrate that, in comparison with a space compactor or an unknown-blocking MISR alone, the hybrid compaction scheme achieves a lower coverage loss without demanding more test-data volume. In addition, we propose a quantitative approach to estimate the required percentage of observable responses for the proposed scheme, directly based on a test-quality metric of un-modeled faults. | en_US |
dc.language.iso | en_US | en_US |
dc.title | A hybrid scheme for compacting test responses with unknown values | en_US |
dc.type | Article | en_US |
dc.identifier.journal | IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN DIGEST OF TECHNICAL PAPERS, VOLS 1 AND 2 | en_US |
dc.citation.spage | 513 | en_US |
dc.citation.epage | 519 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000253303700082 | - |
顯示於類別: | 會議論文 |