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dc.contributor.authorTsai, Hui-Wenen_US
dc.contributor.authorKer, Ming-Douen_US
dc.date.accessioned2014-12-08T15:07:59Z-
dc.date.available2014-12-08T15:07:59Z-
dc.date.issued2010-01-01en_US
dc.identifier.issn0026-2714en_US
dc.identifier.urihttp://dx.doi.org/10.1016/j.microrel.2009.09.004en_US
dc.identifier.urihttp://hdl.handle.net/11536/6273-
dc.description.abstractA new 2xVDD-tolerant mixed-voltage I/O buffer circuit, realized with only 1xVDD devices in deep-submicron CMOS technology, to prevent transistors against gate-oxide reliability and hot-carrier degradation is proposed. The new proposed 2xVDD-tolerant I/O buffer has been designed and fabricated in a 0.13-mu m CMOS process with only 1.2-V devices to serve a 2.5-V/1.2-V mixed-voltage interface, without using the additional thick gate-oxide (2.5-V) devices. This 2xVDD-tolerant I/O buffer has been successfully confirmed by simulation and experimental results with operating speed up to 133 MHz for PCl-X compatible applications. (C) 2009 Elsevier Ltd. All rights reserved.en_US
dc.language.isoen_USen_US
dc.titleDesign of 2xVDD-tolerant mixed-voltage I/O buffer against gate-oxide reliability and hot-carrier degradationen_US
dc.typeArticleen_US
dc.identifier.doi10.1016/j.microrel.2009.09.004en_US
dc.identifier.journalMICROELECTRONICS RELIABILITYen_US
dc.citation.volume50en_US
dc.citation.issue1en_US
dc.citation.spage48en_US
dc.citation.epage56en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000274610400007-
dc.citation.woscount1-
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