完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 蔡明宏 | en_US |
dc.contributor.author | Tsai, Ming-Horng | en_US |
dc.contributor.author | 高曜煌 | en_US |
dc.contributor.author | Kao Yao-Huang | en_US |
dc.date.accessioned | 2014-12-12T02:18:59Z | - |
dc.date.available | 2014-12-12T02:18:59Z | - |
dc.date.issued | 1997 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#NT860435023 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/63043 | - |
dc.description.abstract | 衛星通訊用之鎖相低雜訊20GHz訊號已發展出來。電路架構的策略是 考量在元件可用性及低價位。訊號是從一個2.5GHz鎖相訊號源倍頻所產生 。2.5GHz鎖相訊號源包括有溫度控制式石英振盪器、高品質因子同軸共振 器式之電壓控制振盪器、頻率合成器之積體電路、預除器和主動式迴路濾 波器。而且,20GHz訊號是循序地由高電子移動率電晶體式的頻率四倍頻 器及頻率二倍頻器所產生。 A locked low phase noise 20GHz signal is developed for the satellite communication. The strategy of the construction is on the component availability and low cost. The signal is multiplied from a 2.5GHz locked source. The locked loop for 2.5GHz source consists of a temperature controlled crystal oscillator (TCXO), voltage controlled oscillator (VCO), high-Q coaxial resonator, frequency synthesizer IC, and active loop filter. And the 20GHz signal is obtained sequentially by quadrupler and doubler frequency multiplier due to the capability of HEMT transistor. | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.subject | 鎖相迴路 | zh_TW |
dc.subject | 倍頻器 | zh_TW |
dc.subject | phase locked loop | en_US |
dc.subject | multiplier | en_US |
dc.title | 主動式倍頻技術20GHz鎖相迴路之研製 | zh_TW |
dc.title | 20GHz Phase Locked Oscillator with Active Frequency Multiplication | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 電信工程研究所 | zh_TW |
顯示於類別: | 畢業論文 |