晶圓製造廠有系統佈置流程之構建

Abstract

晶圓製造廠的運作常會因地板空間的設計不良而妨礙製造與物料處理的效率，進而增加額外的操作費用。因此，設計有效率的佈置是建立晶圓製造廠的先決條件。一般而言，工廠佈置是依照Muther有系統佈置計劃（Systematic Layout Planning，SLP）來進行。然而，對於晶圓製造廠來說，晶圓種類的繁多以及複雜、再迴流製程的特性，導致其佈置的困難度增加。為了彌補傳統SLP流程的不足，本研究考慮晶圓廠特性、建築與設施本身的限制以及操作與製程因素，構建一適合於晶圓製造廠的佈置流程，並進一步地利用實例來說明本研究流程，以顯示本研究的可行性。

Semiconductor fabrication facilities cannot operate at optimal levels and add to extra operating expenses because their poor floor layouts hamper manufacturing and material handling efficiency. Therefore, designing an effective layout is the prerequisite for building a semiconductor fab. Generally speaking, the traditional layout design process utilizes Systematic Layout Planning which is developed by Muther. However, complicated processes and uncertainties make SLP difficult for use on the layout design for semiconductor fabs. To resolve this problem, this thesis considers semiconductor fab's characteristics and develops a systematic layout procedure for semiconductor fabs. In addition, a case study is presented to illustrate the proposed procedure's effectiveness. The result reveals that the proposed procedure is feasible for semiconductor fabs.