X86超純量微處理機之資料存取指令的推測性排序

Abstract

在現有的超純量微處理機架構中，資料存取單元通常採用較保守的排序方式。其資料存取指令間之真實資料相依性 (true data dependency) 是在派發到資料快取記憶體前檢查，以提供資料載取指令的規避執行 (bypassing) 及轉送執行 (forwarding)。但是真實資料相依性仍然嚴重限制指令平行度 (Instruction Level Parallelism)。因此，近年來有關資料載取指令之推測性執行 (data speculation) 開始被提出，以增加資料載取指令的執行效能。 在本篇論文中，我們所提出的資料載取指令推測性排序 (speculative scheduling) 不僅推測資料載取指令的資料相依性 (data dependency)，更推測其轉送執行 (forwarding) 的可能性及可能產生的資料位址 (data address)。因此可以允許資料載取指令在資料位址尚未產生及真實資料相依性尚未檢查前，即先派發到資料快取記憶體中載取資料或直接由可能相依的儲存指令轉送資料。這比已經提出的資料相依性推測執行 (data dependency speculation) 方法在相當程度的準確率下更早作資料相依性的推測。最後更提出選擇性推測 (selective speculation) 的設計，以減少猜錯率。

The design of Load/Store Units in existed superscalar microarchitectures is always restricted on the conservative scheduling of load/store operations. True data dependency of a load operation is checked before issuing to the data cache. Only load bypassing or forwarding is provided in the scheduling policy of the load/store units. However, the instruction level parallelism is still limited by true data dependencies seriously. Thus, various speculation methods have been proposed to increase the execution performance of load/store operations. The speculative scheduling proposed in this thesis not only predicts data dependencies of load operations, but also predicts the possibilities of data forwarding and data addresses of load operations. Thus, a load can speculatively bypass stores or be speculatively forwarded data directly from the store that might be depended upon before the address generation and true data dependency checking. Our model speculatively executes load operations much earlier than the proposed methods of data dependency speculation under precise prediction. Finally, the selective design is proposed to reduce mis-speculations.