高壓互補式金氧半場效電晶體的製作與模擬

Abstract

本論文所探討的主題為高壓互補式金氧半場效電晶體元件的製作與模擬。利用標準低壓邏輯的互補式金氧半場效電晶體元件的製程參數及方法，並且在不影響標準製程的情況下，加入針對於高壓元件的製程方法，使得一個晶片上能同時有低壓和高壓的元件。這樣的一種組合將會增加元件的應用範圍，符合了現今在電路設計上的需求。 高壓元件製作的光罩數及其佈局是製作模擬的第一步，在決定了之後，接著利用製程模擬得到了專門對高壓元件的製程參數，最後利用元件模擬得到了符合高壓元件和低壓元件在電路操作上所需求的電特性。

This thesis focuses on fabrication and simulation of high-voltage CMOS devices. Based on Standard low-voltage CMOS fabrication process recipes, and with specific additive process steps onto high-voltage CMOS without affecting any low-voltage CMOS characteristics. This makes combining both low-voltage devices and high-voltage devices on a chip possible. This combination is not only increasing the range of its applications but also meet the requirement of the circuit designer uptodate. Mask counting and layout decision is the first step to high-voltage device design. After its layout and its masks, we use process simulator to have recipes on it. Finally go to device simulator to get reasonable electrical characteristics that can be operate in circuits.