標題: | 穿遂氧化層漏電流之特性與模擬 Numerical Simulation and Characterization of SILC in Oxides |
作者: | 葉致鍇 Yeh, Chih-Chieh 汪大暉 Wang, Tahui 電子研究所 |
關鍵字: | 穿遂氧化層漏電流;暫態穿遂漏電流;SILC;Transient SILC |
公開日期: | 1998 |
摘要: | 我們研究了Edge-FN和FN加壓(stress)所造成的漏電流機制及暫態特性。在N型MOSFET元件中,發現了穿遂氧化層閘極電流(SILC)與基極電流的相關性。藉此,我們發展出一套氧化層中電洞導致穿遂電流之數值方法模型(numerical positive-oxide-charge-assisted tunneling model)。加壓所造成的氧化層電洞其庫倫力會增加局部地方的漏電流。而Edge-FN 或-FN穿遂氧化層漏電流的暫態部分(transient component)及+FN穿遂氧化層漏電流的之直流部分(DC component)皆歸因於氧化層電洞導致穿遂電流(positive-oxide-charge-assisted tunneling current)。研究中發現氧化層電洞導致的暫態穿遂漏電流部分有很強的電場對應關係,並遵循和時間成指數關係(即 t-n)。其中n值由電子和電洞的穿遂質量及穿遂能障的比值所決定。此外,基極電流來源於氧化層電洞放電並且和時間成1/t關係。
研究中亦發現,穿遂漏電流和電洞之位置有強烈的相關性。在加壓測試中,能帶到能帶穿遂(band-to-band tunneling)產生之熱電洞(hot hole)可藉由橫向電場加速得到能量且射入閘極氧化層內。實驗發現在正閘極電位量測時,閘極穿遂漏電流和基極電流會隨加壓測試的垂直電場增加而減少。由於垂直電場的增加,氧化層電洞的位置將更接近多晶係閘極(poly-gate)。因此較小的穿遂機率將大幅降低閘極穿遂漏電流和基極電流。然而,加壓測試亦會造成不同位置的氧化層電洞,並顯示不同的穿遂漏電流特性。藉由操作電位的最佳化(即電洞位置的決定),穿遂漏電流可降至最低。 The mechanisms and transient characteristics of edge FN and uniform FN stress induced leakage current (SILC) in tunnel oxides are investigated. A correlation between stress induced gate current and substrate current in a n-MOSFET is observed. A numercal positive-oxide-charge-assisted-electron tunneling model is proposed. A coulumbic potential caused by a stress created positive oxide charge is included in the model. The positive oxide charge acts as a sequential tunneling center and increases leakage current at a localized spot.The transient component of Edge-FN SILC or -FN SILC and the DC component of +FN SILC are attributed to positive oxide charge assisted tunneling current.The transient component of SILC induced by positive oxide charge is found to have a strong field dependence and follows a power law time dependence. The power factor is determined by the ratio of electron and hole tunneling masses and tunneling barriers. Moreover, we found that the low field substrate current results from positive oxide chaege detrapping and follows a 1/t time dependence. A strong correlation between SILC and hole trap location is observed. In edge-FN stress, the bans-to-band tunneling generated holes can gain much energy by lateral field heating and inject into gate oxide. SILC and substrate current measured at a positive oxide field are found to decrease as the vertical stress field increases. The reason is that injected holes are driven more towards the gate at a larger oxide field. Thus, positive oxide charge detrapping current (substrate current) and positive oxide charge assisted electron tunnel;ing current (SILC) are smaller at a positive measurement field. By optimizing the operating bias condition (i.e. the hole trap position), SILC can be minimized. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#NT870428040 http://hdl.handle.net/11536/64324 |
顯示於類別: | 畢業論文 |