電極材料、基板溫度、薄膜厚度及濺鍍氣氛對鈦酸鍶鋇(Ba0.65Sr0.35TiO3)薄膜電容器的電和介電性質的影響

Abstract

隨著高密度動態隨機存取記憶體的儲存節尺寸的縮小， 由於直接穿透效應更為顯著，使得傳統氧化矽和氮氧化矽已不再適用。所以需要高介電係數材料來保持較簡單結構的記憶單胞。常用的高介電係數材料有氧化鉭、 鈦酸鍶、鈦酸鋯鉛和鈦酸鍶鋇。鈦酸鍶鋇是一種非常適合應用在高密度動態隨機存取記憶體電容器的高介電係數材料，因為其具有較高的介電係數、漏電流低、使用壽命長及低損耗因子的特性。 本論文首先比較不同電極與基板溫度對鈦酸鍶鋇薄膜電性的影響，接著探討不同膜厚和氧/(氬+氧)比例(OAR) 鈦酸鍶鋇薄膜對應力衍生漏電流機制的變化，最後研究不同OAR鈦酸鍶鋇薄膜的介電鬆弛、缺陷密度及等效電路。

As the dimensions of the charge storage node in high-density dynamic random access memory (DRAM) are scaled down. Silicon dioxide and silicon oxynitride which have been used as capacitor dielectric materials are no longer applicable because their thickness is already limited by direct tunneling. High dielectric constant materials are needed to keep a simpler cell structure. Potential dielectrics with high dielectric constant include Ta2O5, SrTiO3, Pb(Zr,Ti)O3 (PZT) and (Ba,Sr)TiO3 (BST)…etc. The BST is one of the most promising materials due to its high dielectric constant, low leakage current, a TDDB over 10 years and low dissipation factor for high density DRAM capacitor. In this work, the electrical properties of BST film deposited on Ir and Pt bottom electrode and their correlation with various substrate temperatures are studied. In addition, the physical mechanism of the stress induced leakage current for BST thin film deposited with different film thickness and various oxygen to argon ratio (OAR) were investigated in details. Finally, the effect of various OAR on dielectric relaxation and defect quantity are discussed and an equivalent circuit model for (Ba0.65Sr0.35TiO3) thin film capacitors are proposed.