砷化銦鎵/砷化鎵量子井應力層之電性及結構分析

Abstract

本論文主要探討晶格應變對材料特性的影響。首先利用C-V量測單量子井結構GaAs/In0.2Ga0.8As/GaAs，得知In0.2Ga0.8As超過臨界厚度（200~300A），量子井的自由載子會被產生的缺陷空乏，而在I-V量測亦得到超過臨界厚度以後漏電流與阻值均會變大。由X-ray分析過程中得知超過臨界厚度，磊晶層之界面干射效應會消失，並且GaAs峰值之右方出現另一峰值，此為上層GaAs在InGaAs鬆弛後即受到垂直方向的壓縮而造成的。另外InGaAs厚度從300A到1000A，InGaAs本身與上層GaAs在PL的能階偏移了44與49meV，而從X-ray所得之數據，配合理論運算的結果也有一致性的結果。基於這兩種量測結果，因此可判斷晶格的鬆弛是始於下層界面，同時上層界面仍保有應力存在，此結果也可對應於TEM的觀測，即大部分的錯位缺陷都跼限在底層接面附近。 對於樣品超過臨界厚度造成之缺陷，我們以深層能階暫態頻譜與導納頻譜來研究缺陷能階的電特性，缺陷能階介於0.33~0.49eV。其中1000A厚之In0.2Ga0.8As其導納之高頻響應是缺陷間接靠著電阻造成的（即所謂電阻效應），其電阻的活化能為0.33eV，而導納之低頻處為缺陷電子的直接反應，此缺陷能階導致費米能被定在缺陷能階處，造成載子被空乏而阻值變高。由於載子被空乏的因素，實際在阻值區的電子濃度無法利用C-V求出，只能從導納間接求出電阻活化能來找出電子濃度，約~ 左右。DLTS也無法求到InGaAs阻值區真正的缺陷分佈，但其 濃度的級數都在約 ，此濃度也可證實DLTS量到的缺陷已足夠造成相當的載子空乏而有使阻值變大。 低溫成長（300℃）多層量子井InGaAs/GaAs結構在低溫下之I-V展現trap-fill-limit傳輸機制，而在高溫之電流為電子、電洞藉由深層缺陷能階對導帶與價帶傳導之產生-結合電流（generation-recombination current）所主導。在DLTS量測與導納頻譜量測所得到的三個缺陷（0.73、0.43與0.71）是互相對應的，在阿瑞尼斯圖上確定互為同一個缺陷。其中0.73eV之缺陷也在550℃溫度成長下的樣品中發現，推論該缺陷的形成機制應該為晶格不匹配造成之晶格鬆弛所導致。對於0.71eV之缺陷在阿瑞尼斯圖上的位置與其在光激暫態電容抑制效應（photo-capacitance quenching effect）可知其應為EL2，而此EL2是由低溫成長之鎵空缺（VGa）與晶格鬆弛產生的錯位缺陷（dislocation）組合造成的。

The transition of carrier distribution from the strained to relaxed state in In0.2Ga0.8As/GaAs quantum well is studied by capacitance-voltage measurement. There is two-dimensional carrier confinement in the In0.2Ga0.8As quantum well with well thickness less than the critical thickness. When well thickness increases beyond the critical thickness, the significant carrier depletion around the quantum well is observed. Double crystal X-ray rocking curves show that when InGaAs well thickness increases beyond the critical thickness, interference pattern disappears and another peak on the right shoulder of the GaAs peak appears, indicating that the top GaAs layer is being compressed in the growth direction by the relaxation of the InGaAs layer. Energy shifts of 44 and 49 meV are observed from the strains of the InGaAs and GaAs top layer when increasing InGaAs thickness from 300 and 1000A. These energy shifts are in agreement with theory calculated based on the data of strain relaxation determined from X-ray diffraction. Both results of photoluminescence and X-ray diffraction provide evidence that the relaxation begins to occur from near the bottom InGaAs/GaAs interface while the top interface still remains strained. This result is further corroborated by the images of cross-sectional transmission electron micrographs which show that most of the misfit dislocations are confined near the bottom interface. An increase in leakage current accompanied by a drastic carrier depletion is found for In0.2Ga0.8As/GaAs Schottky diode when the In0.2Ga0.8As thickness is large its critical thickness. Due to drastic carrier depletion, free-carrier concentration around the In0.2Ga0.8As region for relaxed samples can not be obtained from C-V data but can be estimated from RC time constant effect observed in capacitance-frequency measurement. A trap at 0.33 to 0.49 eV is observed for relaxed samples by deep-level transient spectroscopy (DLTS). The order of magnitude of the ionized trap's concentration is about the same as the incorporated dopants obtained from DLTS, plus the fact that the resistance caused by carrier depletion has an activation energy close to that of the trap, confirming that the carrier depletion is caused by capture from the trap. The I-V curves of the 300℃-grown multiple quantum wells exhibit a trap-filled limit current at low temperature and a generation-recombination current via deep levels at high temperature. Three deep levels (activation energy 0.73, 0.43 and 0.71eV) are observed in DLTS as well as admittance spectroscopy. The 0.73eV trap is also observed in 550℃-grown samples, suggesting that is a common defect in relaxed InGaAs/GaAs structure and is probably origated from the defect states related to the strain relaxation. The 0.71eV trap closing to the activation energy observed in the I-V characteristics, is expected to be the dominating deep level which governs the current conduction. The emmission parameters and photo-capacitance quenching effect for this trap agree with those known for EL2 defect, suggesting that the EL2 defect is strongly enhance in InGaAs/GaAs by LT growth.