標題: A new spread spectrum clock generator for SATA using double modulation schemes
作者: Hsieh, Yi-Bin
Kao, Yao-Huang
傳播研究所
Institute of Communication Studies
公開日期: 2007
摘要: A new spread spectrum clock generator (SSCG) using double modulation is presented in this paper. Not only the divider is varied, but also the voltage controlled oscillator is modulated. This technique can enhance the modulation bandwidth so that the effect of EMI suppression is improved and can optimize the jitter caused by the Sigma Delta modulator. In addition, the method of two-path is applied to reduce the capacitance value such that the total integration can be achieved. The proposed SSCG has been fabricated in a 0.18um CMOS process. The clock of 1.5GHz with down spread ratio of 0.5% is realized for applications to serial ATA. The 19.63dB EMI reduction (RBW=10KHz) and 35ps-pp period jitter are achieved in this study. The size of chip area is 0.44x0.48mm(2). The power consumption is 27mW.
URI: http://hdl.handle.net/11536/6545
ISBN: 978-1-4244-0786-6
期刊: PROCEEDINGS OF THE IEEE 2007 CUSTOM INTEGRATED CIRCUITS CONFERENCE
起始頁: 297
結束頁: 300
顯示於類別:會議論文