高效能CMOS展頻訊號產生器之設計與分析

Abstract

在消費電子中隨著高速傳輸需求的日益增加，工作頻率已達到數仟兆赫。因為工作頻率增加時，這些裝置所產生及輻射的電磁干擾也快速遞增。所以一個低成本且有效降低電磁干擾的方法是目前所需要的。目前有很多方法可以來減少電磁干擾，在這些方法中，展頻訊號時脈正受到許多矚目因為其系統成本是最低的，其原理為在一定的速度及方法下調變時脈使其有效抑制電磁干擾。 本論文介紹四個不同展頻訊號產生器將，其中用了三種不同的調變方法。首先研究一個傳統的分數差異積分調變展頻訊號產生器，其原理為使用差異積分調變器來調變除法器。傳統的差異積分調變器的輸入範圍有限制，當展頻大小超過其輸入範範圍時，展頻訊號產生器會無法正常工作導致大幅降低電磁干擾抑制能力及時間抖動成效。因此本論文的第一個主題為克服這個限制並發展出一個新型分數差異積分調變展頻訊號產生器且具有廣輸入範圍的差異積分調變器。 接著研究一個使用電壓控制振盪器調變的展頻訊號產生器。傳統的電壓控制振盪器調變的展頻訊號產生器的其中一個問題為在產生三角波時有太多的限制，三角波為普遍使用的調變型式。另外一個困難為所需要的電容面積太大（大於數十個十億分之一法拉）使其很難整合在晶片中，其原因為其所需要的迴路頻寬太小了。本論文中所提出的電壓控制振盪器調變的展頻訊號產生器使用了一個雙迴路濾波器並同時使用了一個特定的充電泵來克服這兩個問題。 最後，本論文發展出兩個使用雙點調變機制的新型的展頻訊號產生器，其同時改變除法器及電壓控制振盪器。其中一個針對雙點調變機制中的時間抖動及電磁干擾做詳細的分析。為了研究雙點調變機制在高速傳輸的應用，進而發展出另一個適用於序列進階技術附加裝置的展頻訊號產生器並證明其可符會其規格。雙點調變中的全導通特性可以增加調變頻寬使得調變的準確度及由差異積分器所產生的時間抖動可以一起改善。此技術導致所提出的展頻訊號產生器具有面積小及功耗低的特點。

With the growing demands of high data rate transmission in consumer electronics, the operation frequency is toward several GHz. As the operation frequency increases, the electromagnetic interference (EMI) generated and radiated by those devices also increases rapidly. Therefore, an effective and low cost method to reduce EMI is becoming imperative. There are many techniques to reduce the EMI. Among these techniques, spread spectrum clocking (SSC), modulating the clock in a given rate and style such that the EMI is lower, is receiving many eyes because the cost to the system is minimal. In this thesis, four different SSCGs with three kinds of modulation schemes are presented. First, a conventional fractional-N based SSCG, using a ΔΣ modulator to modulate the divider, is studied. The input range of the conventional ΔΣ modulator is limited. When the spread ratio is exceeded its input range, the SSCG will be breakdown, and the EMI reduction and jitter performance will be degraded very much. Thus the subject of this dissertation is to overcome the limitation and to develop a new fractional-N based SSCG with a wide input range of ΔΣ modulator. Then, a voltage controlled oscillator (VCO) modulated SSCG is investigated. One major issue of the conventional VCO modulated SSCG is that it has much constraints on the generation of the triangular waveform, which is a popular modulation profile. Another difficulty is the required large capacitance (more than tens of nF) to make it hard totally integration because the loop bandwidth is very small. The proposed VCO modulated SSCG overwhelms these two issues by combing a dual-path loop filter with a particular charge pump. Last of all, two new SSCGs with a two-point modulation scheme are built. Both the divider ratio and the voltage controlled oscillator are varied. One is focused on the jitter and EMI analysis of the two-point modulation scheme. In order to evaluate the high data rate application of two-point modulation, the other is developed for the application of serial advanced technology attachment (SATA) and is proven to meet the specifications of SATA. An all-pass characteristic of the two point modulation can enhance modulation bandwidth in order that the modulation profile accuracy and jitter performance caused by the ΔΣ modulator can be improved at the same time. This technique results in the proposed SSCG with small area and low power consumption.