標題: A wide input-range Sigma Delta modulator for applications to spread-spectrum clock generator
作者: Kao, Yao-Huang
Hsieh, Yi-Bin
傳播研究所
Institute of Communication Studies
關鍵字: PLL;spread spectrum;sigma-delta modulator
公開日期: 2006
摘要: A spread-spectrum clock generator (SSCG) using fractional-N phase-locked loop (PLL) with an extended range sigma-delta (EA) modulator is presented in this paper. The proposed EA modulator simply adds an extra output bit in the first stage modulator. It can enlarge the input range about three times as compared to the conventional modulator and solve the saturation problem when the input exceeds the boundary of the conventional modulator. The proposed SSCG has been fabricated in TSMC 0.35-um double-poly quadruple-metal CMOS process with output frequency of 300MHz. The active area is 0.63x4.62 mm(2) and the power consumption is 17.5mW.
URI: http://hdl.handle.net/11536/17454
ISBN: 978-1-4244-0386-8
期刊: 2006 IEEE Asia Pacific Conference on Circuits and Systems
起始頁: 530
結束頁: 533
顯示於類別:會議論文