A spread-spectrum clock generator using fractional-N PLL with an extended range Sigma Delta modulator

Abstract

A spread-spectrum clock generator (SSCG) using fractional-N phase-locked loop (PLL) with an extended range sigma-delta (Sigma Delta) modulator is presented in this paper. The proposed Sigma Delta modulator simply adds an extra output bit in the first stage modulator. It can enlarge the input range about three times as compared to the conventional modulator and solve the saturation problem when the input exceeds the boundary of the conventional modulator. A flexible digital modulation controller can generate center and down spread-spectrum modulation and each has spread ratios of 0.4%, 0.8%, 1.6% and 3.2%. The proposed SSCG has been fabricated in TSMC 0.35-mu m double-poly quadruple-metal CMOS process with output frequency of 300 MHz. The active area is 0.63 x 0.62 mm(2) and the power consumption is 17.5 mW.