高效能微處理機之功率導向全域訊號繞線處理器

Abstract

在這一篇論文中，我們探討全域訊號繞線的功率節省問題。我們所提出的演算法以處理腳位配置與調整繞線順序來節省全域訊號繞線的動態功率消耗。以 NSC98-T7 這顆高效能微處理機為實驗樣本，其有 13881 條全域訊號繞線來連接頂層模組。全域訊號繞線器(GSR)是一個以增進繞線能力與減少繞線長度的繞線處理器。在本實驗中，加入了以訊號切換頻率為主的優先權繞線與節省功率的腳位交換程序使其達到低功率的效果，我們稱之為低功率全域訊號繞線器(LPGSR)。主要的想法為縮短高切換頻率的訊號的繞線長度，而延伸較低切換頻率訊號線的繞線長度，因為高切換頻率訊號線有較早繞線的權利，使其有較多的繞線資源，可以走較短路徑。在腳位交換時，高切換頻率的訊號線其腳位被移至較接近的位置，進而縮短其距離而得以降低功率。因為在訊號切換頻率目前仍無法獲得的情況下，我們使用四種人工產生訊號切換模型來計算程式繞線結束時的動態功率。最後，依照不同的模型，實驗結果顯示出 3~7% 的功率節省。

In this thesis, we investigate the problem of energy reduction in global signal routing. Our algorithm manipulates pin locations and net ordering order to reduce the dynamic power consumption of global signal wires. NSC98-T7, a high performance microprocessor, was used to demonstrate the improvement in power reduction. NSC98-T7 has 13881 global signal wires which interconnect hard macro-modules. The GSR is a two-layers router using the 4th and 5th metal layer; and it uses line search algorithm. The GSR focused on routability and routing length minimization. The GSR was enhanced to a Low Power Global Signal Router(LPGSR) which arrange the routing order based on switching activity and energy driven pin exchange. The main idea is to reduce power consumption by shortening the high switching wires and stretching the low switching wires because wires routed earlier have more routing resource. During the pin exchange phase, pins of wires with high switching frequency were moved closer to reduce power. Since the wire switching frequencies are unavailable, four artificial switching models are used to evaluate the performance of the LPGSR. The experiment results show that 3-7% power reduction has been achieved for various switching models.