標題: 金氧半場效電晶體臨界電壓之不匹配模型和對電路良率的衝擊
MOSFET Threshold Voltage Mismatch Model and Its Impact on Circuit Yield
作者: 唐千峰
Chien-Fong Tang
陳明哲
Ming-Jer Chen
電子研究所
關鍵字: 不匹配;臨界電壓;數位類比轉換器;良率;mismatch;threshold voltage;digital to analog converter;yield
公開日期: 1999
摘要: 目前的高科技產業以及電子工業都朝個通訊以及多媒體發展。網際網路、手機、數位相機等的多媒體通訊產品越來越多。而這些產品的某些電路常扮演著真實世界與數位處理器的溝通的角色。像是數位訊號和類比訊號間的轉換器等。而這些積體電路在設計上常常需要相同的元件,如:電晶體、電阻、電容。但實際上,是不可能有完全相同的元件的。因此,研究這些元件參數匹配的統計特性益顯得重要。得到了這些匹配的統計特性後,我們可以在設計完類比數位電路後,去計算這設計出的積體電路的良率,是否符合經濟效益。也可以用來改良電路設計法則,讓不匹配的效應減至最低。 本論文包含兩大部分,第一部份是針對金氧半電晶體的臨界電壓的不匹配模型發展,並探討模型公式裡的參數的合理範圍。而第二部分,則是嘗試著用臨界電壓的標準差去算出正確的數位類比轉換器的良率,並且討論這種方法的理論以及準確度。
Nowadays, many of the high-technology electronics industries are developing advanced communication and multimedia products. The requirements of these products, such as internet peripherals, mobile phone, and digital camera, become more and more. And certain circuits in these products act as the bridge between the real world and the digital processing units. The representation circuits like digital to analog converter (DAC) need that devices, such as transistors, resistors, capacitors, are best the same in parameters when they are being designed. However, there are not two things exactly the same. So, the research of the mismatch model becomes more and more important. Once we get the statistical properties of the mismatch, we can use it to compute the yield of some kind of analog/digital circuits such as to see if the design is worth of being implemented. Besides, we can also use it to improve the design rule of circuits in order to make the least effect of mismatch on circuits. This paper contains two major parts. The first part is about the development of mismatch model. Also discussed is the reasonable range of the parameters in the model equation. In the second part, we try to use the standard deviation of the threshold voltage to compute the yield in a precise DAC, and address the theory behind as well as its corection. English Abstract………….………………..……………………………….III Acknowledgement………………………………………………….……….V Contents……………………………………………………….……………VI Table Captions…………..…………..….………………………...……….VII Figure Captions……………………….……...…………………………..VIII Chapter 1 Introduction……………………………………………..……...1 Chapter 2 MOSFET Threshold Voltage Mismatch Model………..………3 2.1 Introduction………..…………………………….……...3 2.2 Model Development…………….....…………………..3 2.3 Fitted Results of Our New Model……..………………..5 2.4 Comparing Three Processes………………….…………8 Chapter 3 Impact of Mismatch on IC yield…………………….………..10 3.1 Introduction………………………………….………...10 3.2 Principles, Method and Procedures…..….….…………10 3.3 Results and Verification…………………….……….…14 3.4 Discussion…………………………………...…………14 Chapter 4 Conclusion……………………………………………………17 Appendix…………………………………………………………………...18 References………………………………..………………………………...21
URI: http://140.113.39.130/cdrfb3/record/nctu/#NT880428062
http://hdl.handle.net/11536/65700
顯示於類別:畢業論文