氨氣電漿處理後溫差液相沈積含氟氧化膜在銅製程上之應用與可靠性分析

Abstract

當半導體元件的線寬縮至0.25微米以下，多層導線的訊號傳送延遲時間成為元件高速操作的瓶頸。使用低介電常數材料取代傳統的二氧化矽作為層間絕緣膜，及使用銅取代鋁作為導線材料，是解決訊號傳送延遲的一個有效方式。 低介電常數材料如MSQ，因為膜質較疏鬆，漏電的問題相當嚴重。目前有人提出在低介電常數材料溝槽側壁覆蓋一層高品質的二氧化矽以降低漏電。另一方面，在銅導線嵌刻結構中，通常銅與介電質之間需要一層阻障層防止銅穿透至介電質，以避免介電質的漏電。但是縱使有一層阻障金屬層，也可能因為局部性的破損使得銅有機會可以穿透。為解決這個漏電的問題，我們提出了以液相沈積氟氧化矽配合後續的氨氣電漿退火處理作為阻障介電層的新穎技術。該技術可以超薄且等向性的沈積在溝槽側壁；且該阻障介電層具有極佳的絕緣性，覆蓋在MSQ上也可有效降低其漏電流；此外，經過物性(二次離子質譜儀)與電性(time-dependent dielectric breakdown, TDDB)的測試，這層阻障介電層確實具有良好的阻障特性，主要原因是在氨氣電漿退火處理後，氟氧化矽表面形成一層氮氧化矽層(SiON)。另外我們也研究氨氣電漿退火時間對介電常數和阻障特性(正比TDDB時間)的效應。隨著退火時間增加，氟氧化矽表面的氮含量隨著增加，但是TDDB時間在處理達15分鐘後即不再增加。因此退火時間15分鐘是個最佳值，相當於表面含氮量約為33.5 atom %。

As device geometry is scaled down to deep submicron region, the resistance-capacitance (RC) delay of interconnection becomes a dominant part of the total delay for device switching. A novel IMD with a low dielectric constant(Low-K) is required to replace the conventional SiO2 and Cu is also used as metal material to replace Al, which are effective solutions to improve the RC delay of interconnection. MSQ is a Low-K material, however, leakage current is awful according to porous film. Therefore, A novel barrier dielectric liner prepared by TD-LPD and NH3-plasma annealing for a reliable Cu/MSQ damascene integration is proposed and qualified. The liner can effectively reduce the leakage current by a factor of ~2.5, and the effective dielectric constant of MSQ after being capped with the 30nm liner is slightly increased by ~0.17 to 2.94. SIMS and TDDB results demonstrate that the liner can effectively block Cu penetration. Thermal stability of Cu/liner stack achieves 550℃. The mechanism of the barrier property is due to formation of the surface (10~13 nm) SiON layer on SiOF film during NH3-plasma annealing. The effect of NH3-plasma annealing time on the barrier property has also been studied. The preferable NH3-plasma annealing time is less than 15 min, beyond which the barrier property in terms of TDDB lifetime is not further improved. 15-min NH3-plasma annealing corresponds to a surface nitrogen concentration of about 33.5 atom %. The liner as a capping is thus very promising to be applied on Cu/MSQ interconnection. Chinese Abstract Ⅰ English Abstract Ⅱ Acknowledgements Ⅲ Contents Ⅳ Table Captions Ⅵ Figure Captions Ⅶ Chapter 1 Introduction 1.1 Background & Motivation 1 1.2 Thesis Organization 3 Chapter 2 Plasma Annealing Effects on TD-LPD FSG as Inter-Cu-Metal Dielectric 2.1 Introduction 5 2.2 Experimental Procedures 6 2.2.1 Fabrication of MIS Test Structure 6 2.2.2 Preparation of XPS samples 8 2.2.3 Measurements 9 2.3 Results and Discussions 9 2.3.1 Xps spectras 10 2.3.2 Thermal stability 12 2.3.3 TDDB characteristics 14 2.3.4 XPS depth profiles 16 2.4 Summary 17 Chapter 3 Novel Barrier Dielectric Linear Prepared by Temperature-Difference -Based Liquid-Phase Deposition and NH3-Plasma Annealing 3.1 Introduction 19 3.2 Experiment Procedures 20 3.2.1 Preparation of test structures for SIMS analysis 20 3.2.2 XPS measurements 22 3.2.3 JE characteristic and TDDB lifetime measurements 23 3.2.4 Preparation of test structures with MSQ integration 24 3.3 Results and Discussions 24 3.3.1 SIMS analysis 24 3.3.2 XPS spectra 25 3.3.3 Thermal stability 26 3.3.4 TDDB characteristics 27 3.3.5 TDDB lifetime 28 3.3.6 XPS depth profile 29 3.3.7 JE characteristics of thin barrier dielectric linear as capping on MSQ 30 3.3.8 Dielectric constant 31 3.4 Summary 33 Chapter 4 Conclusions Conclusions 35 Reference 37 Publications i Vita ii