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dc.contributor.author楊文誌en_US
dc.contributor.authorWen-Ze Yangen_US
dc.contributor.author張國明en_US
dc.contributor.authorKow-Ming Changen_US
dc.date.accessioned2014-12-12T02:23:13Z-
dc.date.available2014-12-12T02:23:13Z-
dc.date.issued1999en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT880428081en_US
dc.identifier.urihttp://hdl.handle.net/11536/65721-
dc.description.abstract薄膜電晶體最常應用於液晶顯示器中的畫素控制元件,但由於非晶矽薄膜電晶體的移動率極小 (低於1 cm2/V-s),所以不能使用於未來製作平面液晶顯示器將周邊驅動電路積體化於大面積玻璃基板的應用,製作高移動率的複晶矽薄膜電晶體將是迫切需要的製程技術。但由於玻璃基板無法承受高溫的特性,因此複晶矽薄膜電晶體的低溫製程技術將是一項重要的關鍵技術,其中又以在低溫將非晶矽薄膜再結晶 (Recrystallization) 為高品質的複晶矽薄膜最為重要。本論文中,我們提出低溫再結晶製程技術改善複晶矽薄膜電晶體的元件特性,包括X-Ray再結晶技術以及通道缺陷的填補技術。 對於非晶矽薄膜的再結晶技術,我們提出了新型的X-Ray再結晶技術,利用高能量的X-Ray對非晶矽薄膜做再結晶處理來取代傳統的600℃ 24 hr爐管退火處理。由電性的研究顯示,經由X-Ray退火處理的複晶矽薄膜電晶體有極優於傳統爐管退火的元件電特性及可靠度,以及較低的複晶矽通道缺陷密度,成功地改善薄膜電晶體的特性。此外,X-Ray再結晶技術是在室溫的情況下處理,並且退火時間僅 3小時,不管是在低溫製程時間或者溫度,也都明顯地優於爐管的低溫製程,並更有效改善複晶矽薄膜電晶體之特性。另外,我們也利用快速退火處理 (RTA) 嘗試改進爐管退火處理的再結晶技術,於非晶矽薄膜經過爐管600℃ 24hr退火處理後,再經過850℃ 30秒的快速退火處理。我們發現再經由RTA退火處理後,比僅有經過爐管退火處理的薄膜電晶體擁有較佳的電特性,這是由於快速退火處理修復通道缺陷與界面缺陷密度 (interface state density)的原因。 最後,我們利用氨氣 (NH3) 電漿處理,進一步填補降低X-Ray製作的複晶矽薄膜電晶體的通道缺陷。我們發現氨氣電漿處理可以大幅的改善薄膜電晶體的電特性,尤其對載子移動率 (carrier mobility)、開關電流比 (On/Off current ratio) 及元件可靠度方面的改善效果卓越,這歸功於矽原子與氨氣中的氮/氫原子形成鍵結(Si-N/Si-H),而填補在通道中grain boundaries和複晶矽薄膜與閘極氧化層介面間的dangling bond。zh_TW
dc.description.abstractPolycrystalline silicon thin-film transistors (poly-Si TFTs) have been used as the pixel switching devices in Active-Matrix Liquid-Crystal Displays (AMLCDs) widely. Unfortunately, the extremely low field-effect mobility (typically below 1 cm2/V-s) in a-Si:H TFTs limits the technology from being developed to form integrated drive circuits on the active matrix plate. The mobilities of amorphous TFTs (a-Si) is not sufficient for useful circuitry. The low electron field effect mobility attainable with these devices limits their applications to the switching elements only. To integrate the switching element with the driver circuits together on the same substrate is very desirable not only to reduce the cost but also to improve the circuit and system reliability. In light of this, poly-Si has been proposed as a very attractive alternative material for the active element of LCDs. Poly-Si TFTs have better characteristics than a-Si thin film transistors, including higher mobility and lower photo-current, thus enables the integration of peripheral circuits as well as the active-matrix switching elements on the same glass substrate. For these reasons, poly-Si TFTs have been intensively investigated for application to large-area AMLCDs. In an effort to develop a simple low-temperature high-performance polysilicon thin-film transistor technology, we report the first study on silicon film crystallization method which was crystallized by X-ray annealing. This unique fabrication process has the advantages of short processing time within 3 hr and at room temperature. The viability of this new crystallization method was demonstrated with n-channel transistor field-effect mobilities of 33 ﹣35 cm2/V-s and On/Off current ratios greater than 106 were obtained without subsequent hydrogenation step being performed. In addition, the combination of SPC and RTA annealing technology was also proposed to obtain poly-Si TFTs with improved electrical performances. We find that the performance of SPC+RTA-treated poly-Si TFTs has slightly higher than SPC-treated ones, because RTA annealing process reduced the grain boundary traps slightly by forming Si-N bond in the intra-grains. Finally, for defect passivation technology for LTP poly-Si TFTs, we utilized ammonia (NH3) plasma to replace the conventional hydrogen (H2) plasma treatment. NH3-plasma passivation can improve enormously the TFTs performances, particularly in carrier mobility and reliability. The improvement can be attributed to the nitrogen pile-up at gate dielectric/poly-Si interface and the strong Si-N bond formation to terminate the dangling bonds at the grain boundaries of the polysilicon films. Chinese Abstract i English Abstract iii Acknowledgment v Contents vi Table Captions viii Figure Captions ix Chapter 1 Introduction 1.1 Overview of polycrystalline silicon thin-film transistors technology 1 1.2 Solid-phase crystallization method 3 1.3 Excimer laser annealing crystallization method 3 1.4 Metal-induce lateral crystallization method 4 1.5 Rapid thermal annealing crystallization method 4 1.6 Motivation 5 1.7 Thesis outline 6 1.8 References 7 Chapter 2 Experimental of Low-Temperature Poly-Si TFTs with X-Ray Crystallization 2.1 Introduction and Background 10 2.2 Low-Temperature Poly-Si TFTs Fabrication Process 11 2.3 Methods of Device Parameter Extraction 14 2.3.1 Determination of threshold voltage (VT) 14 2.3.2 Determination of subthreshold swing 15 2.3.3 Determination of field effect mobility (μFE) 15 2.3.4 Determination of on/off current ratio 16 2.3.5 Extraction of grain boundary trap state density (Nt) 16 2.3.6 Determination of activation energy 18 2.4 References 18 Chapter 3 Electrical Characteristics of Low-Temperature poly-Si TFTs 3.1 Electrical Characteristics 20 3.2 X-ray Crystallization Mechanism 23 3.3 Leakage Current 24 3.4 Kink Effect 27 3.5 Effect of Temperature 28 3.5.1 Threshold voltage 29 3.5.2 Field-effect mobility 29 3.6 Effect of NH3-Plasma Passivation 30 3.6.1 Defects passivation mechanism 31 3.6.2 Samples preparation 31 3.6.3 Results and discussion 32 3.7 References 33 Chapter 4 Conclusions and Future Works 4.1 Conclusions 38 4.2 Future Work 39en_US
dc.language.isoen_USen_US
dc.subject薄膜電晶體zh_TW
dc.subject再結晶zh_TW
dc.subject低溫再結晶zh_TW
dc.subjectX光再結晶zh_TW
dc.subjectTFTen_US
dc.subjectLow-Temperatureen_US
dc.subjectPolycrystallineen_US
dc.subjectX-ray crystallizationen_US
dc.title低溫複晶矽薄膜電晶體製程及特性之研究zh_TW
dc.titleFabrication and Characterization of Low-Temperature Polycrystalline Silicon Thin-Film Transistorsen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
Appears in Collections:Thesis