標題: | 深次微米矽在絕緣層上N型金氧半場效電晶體之研究 A Study of Deep Submicron SOI NMOSFET's |
作者: | 吳順得 Sung-Dtr Wu 張俊彥 荊鳳德 Dr. C. Y. Chang Dr. A. Chin 電子研究所 |
關鍵字: | 反短通道效應;反窄通道效應;短通道效應;暫態增強擴散效應;寄生電晶體效應;矽在絕緣層上;漂浮本體效應;閘極引起汲極漏電;RSCE;RNCE;SCE;TED;PBT;SOI;floating body effect;GIDL |
公開日期: | 1999 |
摘要: | 在本論文中,可發現較薄的SOI元件其反短通道效應與反窄通道效應是減小的。實驗的發現可藉由通道寬度邊緣矽與場氧化層交界的橫截面積的減少,以致於由晶隙性矽所引起的硼隔離分散到場氧化層的效應降低,導致較薄的SOI元件其反窄通道效應減小來解釋。此外,反短通道效應、反窄通道效應與通道熱電子所造成的閘極引起汲極漏電的退化率可藉由氮離子佈值來降低。而使用H閘極結構,由於其兩端基體接觸的存在,因此可明顯降低漂浮本體效應。至於輻射對SOI元件所造成的影響,則有些獨特的特性被發現。對部分空乏的SOI元件來說,輻射後其短通道效應與反窄通道效應變得較嚴重;相反的,經輻射後的完全空乏的SOI元件則有較佳的短通道效應與明顯的臨界電壓下降。 In this thesis, it is found that devices with thinner silicon film show a reduced reverse narrow channel effect as well as reverse short channel effect. The experimental findings can be explained by a decrease of cross-sectional silicon/oxide interface area in the width edge so that the boron segregation into oxide due to silicon interstitials is reduced, leading to a reduced RNCE in SOI devices with thinner silicon film. Furthermore, it is proved that the RSCE, RNCE and degradation rate of GIDL caused by channel hot electron stress (CHES) can be reduced by nitrogen implant. In addition, using H-gate structure significantly reduces the floating body effect because of the existence of two sides substrate contact. As to the effect of radiation on SOI devices, some particular characteristics are found. Contrarily to PDSOI devices, which depict more serious SCE and RNCE after radiation, the irradiated FDSOI devices depict a better SCE and a significant Vth reduction. Abstract (English)………………………………………………………二 Acknowledgment (Chinese)………………………………………………三 Contents……………………………………………………………………四 Table Captions……………………………………………………………六 Figure Captions…………………………………………………………七 Chap. 1 Introduction……………………………………………………1 1.1 General Background…………………………………………1 1.2 The Advantages of SOI Technology………………………3 1.3 Organization of the Thesis………………………………6 Chap. 2 Experiments………………………………………………………8 2.1 Introduction…………………………………………………8 2.2 Vertical Furnace with HF-Vapor Cleaning……………9 2.3 The Fabrication of SOI NMOSFET’s……………………9 2.4 The measurement techniques……………………………14 Chap. 3 Characterization of SOI NMOSFET’s……………………15 3.1 The effects of silicon film thickness on the RSCE and RNCE………………………………………………………15 3.2 The impacts of gate structure on SOI floating body effect…………………………………………………………18 3.3 The effect of radiation on SOI NMOSFET’s…………20 3.4 Summary…………………………………………………………23 Chap. 4 The Impacts of Nitrogen on SOI NMOSFET’s……………24 4.1 The effect of nitrogen on the RSCE and RNCE………24 4.2 The effect of nitrogen on GIDL…………………………25 4.3 Summary…………………………………………………………26 Chap. 5 Conclusion………………………………………………………28 Publication List…………………………………………………………29 References…………………………………………………………………30 Vita |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#NT880428088 http://hdl.handle.net/11536/65729 |
Appears in Collections: | Thesis |