電荷幫浦法於薄閘極氧化層淺接面延伸結構之N型金氧半元件電漿蝕刻傷害之研究

Abstract

在現今高密度IC製程中，電漿蝕刻製程技術最被廣泛使用。然而，電漿蝕刻導致之元件傷害是無可避免的，尤其是對於短通道元件，有越趨嚴重的情形，將是目前可靠性面臨的主要問題之一。電漿蝕刻將對元件帶來兩種型態的傷害，一是電漿放電造成的傷害(Plasma Charging Damage)，另一則是閘極邊緣區域的傷害(Plasma Edge Damage)。在過去，這兩種傷害往往是被獨立探討的。 在本研究論文中，我們提出一個新的機制，即是兩種形式的電漿傷害並非完全獨立的兩回事，而是會有電漿放電增強閘極邊緣傷害(Plasma Charging Enhance Edge Damage)的情況發生。我們利用不同天線結構(Antenna Structure)來對電漿蝕刻導致之傷害進行研究。對短通道元件而言，電漿導致的會隨元件通道長度縮小而增強，我們採用電荷幫浦法來萃取界面電荷(interface state)及氧化層電荷(oxide charge)，深入探討元件製程傷害程度以及評估其電漿蝕刻導致的熱載子傷害程度。最後，針對三種改善電漿蝕刻傷害之製程(氧化層的材質改善、多晶矽閘極再氧化氣氛變化、以及電漿過度蝕刻時間之控制)進行實驗分析與比較，證實可以有效的改善蝕刻傷害所造成的元件可靠性問題。

Plasma etching is the most popular technology for the modern IC manufacturing. However, plasma etching induced damage has become more and more serious and can not be avoided, in particular for short channel devices. This has been one of the majors issue in reliability. Plasma interaction with the silicon wafer during etching process produces damage. There are two types of damage induced by plasma etching. One is the plasma charging damage and the other one is the plasma edge damage. In the past, these two types of damages are usually studied independently. In this thesis, we proposed a new mechanism to explain the observed plasma charging damage induced edge damage. The two types of damage are not independent but correlated with each other. The devices with different antenna structures will be used to study the plasma induced edge damage. For a reduced channel length, an enhanced device degradation was observed near drain region. The charge pumping method has been employed to extract the interface states and oxide charge, which can provide accurate information of the plasma induced damage as well as the hot carrier induced damage. Finally, three curing process including gate oxide forming gas, poly-reoxidation ambiances, and controllable over-etch time will be used to study the way to improving the plasma induced damage. It was verified that the proposed methods are very efficient for improving the plasma induced device reliability.