Full metadata record
DC Field | Value | Language |
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dc.contributor.author | 巫勇賢 | en_US |
dc.contributor.author | Wu YungHsien | en_US |
dc.contributor.author | 荊鳳德 | en_US |
dc.contributor.author | 吳啟宗 | en_US |
dc.contributor.author | Albert Chin | en_US |
dc.contributor.author | Chhi-Chong Wu | en_US |
dc.date.accessioned | 2014-12-12T02:23:17Z | - |
dc.date.available | 2014-12-12T02:23:17Z | - |
dc.date.issued | 1999 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#NT880428123 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/65767 | - |
dc.description.abstract | 我們已發展出成長磊晶矽鍺合金的新方法。這方法主要是藉由固相磊晶法將沈積在矽基板上的無晶狀鍺層在高溫下趨入並形成矽鍺磊晶層。我們發現晶片表面殘存原生氧化層的存在與否對於矽鍺層的品質有重大的影響。為了評估此矽鍺層應用於實際元件的可行性,我們首先研究矽鍺氧化層的特性。量測發現將此矽鍺層直接於乾氧的環境中氧化,其品質是可以和二氧化矽相提並論的,這可從漏電流,崩潰電場以及崩潰電荷的特性得到證實。然而這樣的結果和以往的文獻記載並不相同,我們推測這樣的差異是因為此方法形成的矽鍺層已是應力釋放過的材料,因此並不會有應力在高溫氧化釋放造成缺陷的現象。儘管如此,此矽鍺層氧化層仍會因鍺原子累積在氧化層和矽鍺介面而造成其介面缺陷密度稍高於傳統的二氧化矽。因此,我們提出在矽鍺層上形成單晶矽的方法,成功地將上層單晶矽層氧化並有效地改善了這個問題。此外,我們也將此矽鍺層應用於P型電晶體的通道,其展現了極佳的電流驅動力與次臨界特性。這項技術的優點不僅在於其簡單,經濟,最重要的是它完全相容於現有的積體電路製程技術。 | zh_TW |
dc.description.abstract | We have developed a new approach to form epitaxial SiGe layer. The epitaxial SiGe was formed by the deposition of amorphous Ge layer and subsequent high temperature annealing through the mechanism of solid phase epitaxy. We have found that the existence of native oxide plays a critical role in the quality of SiGe layer. To evaluate the feasibility of this SiGe layer in practical applications, we have first investigated the quality of oxide directly grown on SiGe. We found that oxide grown in dry oxygen ambient shows comparable quality with silicon dioxide as evidenced by the characteristics of leakage current, breakdown field and charge to breakdown. However, this result is much different from that in the previous reporters. We deduce that SiGe formed in this method has been a relaxed material and may not suffer from the strain-relaxation related problems in the high temperature oxidation step. Nevertheless, it still has slightly higher interface trap density because of the Ge pile-up in the oxide/SiGe interface. Aiming at the problem, we have proposed a structure that has a single crystalline Si layer on SiGe by which oxidation could be performed on Si rather than SiGe itself and oxide quality could be further improved. On the other hand, we have successfully integrated this technique into current VLSI technology to fabricate SiGe-channel PMOSFET’s. It manifests superior current drive capability and good subthreshold swing. More important, this approach is simple, less expensive and fully compatible with current VLSI technology. 1.1 Motivation to Study SiGe ………………………………………………………... 1 1.2 Background of SiGe ………………………………………………………………2 1.3 The Growth of SiGe Epitaxial Layer ……………………………………………..4 1.4 Applications of SiGe …………………………………………………………….. 6 1.5 Outlook of SiGe for the future …………………………………………………..12 1.6 Innovation and Contribution …………………………………………………….13 Chapter 2 Formation of epitaxial SiGe from deposited amorphous Ge on Si 2.1 Introduction …………………………………………………………………… 21 2.2 Experiment ……………………………………………………………………. 22 2.3 Results and Discussion ………………………………………………………... 23 2.4 Conclusion …………………………………………………………………….. 26 Chapter 3 Gate oxide integrity of thermal oxide grown on high temperature formed Si0.3Ge0.7 3.1 Introduction …………………………………………………………………… 32 3.2 Experiment ……………………………………………………………………. 33 3.3 Results and Discussion ………………………………………………………... 34 3.4 Conclusion …………………………………………………………………….. 39 Chapter 4 High Quality Thermal Oxide Grown on High Temperature Formed Si0.6Ge0.4 4.1 Introduction …………………………………………………………………… 53 4.2 Experiment ……………………………………………………………………. 55 4.3 Results and Discussion ………………………………………………………... 56 4.4 Conclusion …………………………………………………………………….. 59 Chapter 5 High temperature formed SiGe p-MOSFETs with good device characteristics 5.1 Introduction …………………………………………………………………… 69 5.2 Experiment ……………………………………………………………………. 70 5.3 Results and Discussion ………………………………………………………... 71 5.4 Conclusion …………………………………………………………………….. 73 Chapter 6 Conclusions Reference …………………………………………………………………………..84 Vita …………………………………………………………………………………99 Publication List ……………………………………………………………………100 | en_US |
dc.language.iso | en_US | en_US |
dc.subject | 磊晶矽鍺合金 | zh_TW |
dc.subject | 矽鍺氧化層 | zh_TW |
dc.subject | 矽鍺P型電晶體 | zh_TW |
dc.subject | 應力釋放 | zh_TW |
dc.subject | 氧化層漏電流 | zh_TW |
dc.subject | 氧化層可靠度 | zh_TW |
dc.subject | Epitaxial SiGe | en_US |
dc.subject | SiGe Oxide | en_US |
dc.subject | SiGe PMOSFET | en_US |
dc.subject | Strain Relaxation | en_US |
dc.subject | Oxide Leakage Current | en_US |
dc.subject | Oxide Reliability | en_US |
dc.title | 磊晶矽鍺合金的成長及其在元件的應用 | zh_TW |
dc.title | Epitaxial SiGe alloy growth and its applications to device | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 電子研究所 | zh_TW |
Appears in Collections: | Thesis |