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DC 栏位语言
dc.contributor.author曾当贵en_US
dc.contributor.authorTang Kui Tsengen_US
dc.contributor.author庄绍勋en_US
dc.contributor.authorSteven S. Chungen_US
dc.date.accessioned2014-12-12T02:23:21Z-
dc.date.available2014-12-12T02:23:21Z-
dc.date.issued1999en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT880428131en_US
dc.identifier.urihttp://hdl.handle.net/11536/65776-
dc.description.abstract复晶矽薄膜电晶体在大面积主动阵列液晶显示器的应用潜力上已经受到广泛的注意。最近,部分应用在电路上的复晶矽薄膜电晶体模式的论文已经被发表,但是却少有论文将温度效应考虑在电路模式中。尤其,更无有关具有温度效应的复晶矽薄膜电晶体模式建立到商用的电路模拟器中。
在本论文中,我们将描述一个具有直流及交流模式的N通道及P通道复晶矽薄膜电晶体的半经验解析模式。这个模式在次临界到饱和区间都是可微分且连续,因此是一个非常适用于加入SPICE电路模拟器中的解析模式。在此一模式中,它包含了闸极偏压诱使晶粒边界位能降低(GIPBL)、汲极偏压诱使晶粒边界位能降低(DIPBL)、通道长度调变、速度饱和效应、Kink 效应及其温度相依效应。我们的半经验解析方法是来自于具有物理意义的解析模式。在这个模式中我们用到很少的参数且部分参数都是和元件结构及制成参数相关。除了列出汲极电流模式外,我们亦发展出与直流模式一致的本质电容电压模式。本质电容电压模式是从汲极电流模式中推导而来,并考量电荷守恒且克服传统MOS的电容电压所遇到的区间不连续的问题。此电容电压模式中我们一并考虑通道长度调变效应及kink效应对元件特性的影响。在模式值及量测值的比较上,我们可以验证模式值在广泛的电压操作区间且温度在20oC到200oC中的准确性。在电路模拟的直流分析方面,从量测值及模式值的比较上,我们可以验证模式的准确性。在电路模拟的交流分析方面,我们串接四级的反相器来预测大面积的元件具有相当严重的时间延迟效应。
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dc.description.abstractPoly-silicon thin-film transistors have received extensive attention for their potential applications in the large-size active-matrix liquid crystal display (AMLCD). Recently, quite a few circuit models for poly-silicon TFT have been reported, but very fewer of them took the temperature factors of poly-silicon TFT model into consideration. So far, none have been implemented into commercially available circuit simulator with temperature dependent features.
In this thesis, a semi-empirical analytical model for the DC and AC characteristics of both n- and p-channel poly-silicon thin-film transistors is described. It is well-suited for implementation in a SPICE circuit simulator because it is differentiable and continuous from subthreshold to saturation regions. The model includes the Gate Induced Grain boundary Potential Barrier Lowering (GIPBL), Drain Induced grain boundary Potential Barrier Lowering (DIPBL), Channel Length Modulation (CLM), velocity saturation, kink effect, as well as their temperature dependence. Our semi-empirical approach results in a physically based model with a minimum of parameters which are related to the device structure and fabrication process. In addition to the drain current model, the intrinsic Capacitance-Voltage (CV) model is derived. The intrinsic CV model derived from our IV model preserves charge conservation and overcomes the discontinuous problem of conventional MOS CV model. The important effects of kink and channel length modulation are also taken into consideration. Comparisons between the model and measured results show excellent agreement over wide ranges of operating voltages with temperature ranges from 20oC to 200oC.
The circuit simulation results of typical poly-silicon TFT circuits in the temperature range from 20℃ to 200℃ are demonstrated. For DC analysis, good agreement between model and measurement can be achieved. For AC analysis, the results of a 4-stage inverter show that timing delay will be serious even for long channel length TFT's.
Chapter 2 The Drain Current Model
2.1 Grain Boundary Potential Barrier Height Model
2.2 Drain Current Model in the Strong Inversion
2.2.1 Effective Mobility Model
2.2.2 Linear Region
2.2.3 Saturation Region
2.3 Weak Region and Continuity
Chapter 3 The Intrinsic Capacitance Voltage Model
3.1 Intrinsic Capacitance Model in the Strong Inversion
3.2 Comparison with Meyer CV Model
Chapter 4 Temperature Deoendence Model
4.1 Parameter Extraction and Optimization
4.1.1 Parameter Extraction Procedure
4.1.2 Parameter Optimization
4.2 Termperature Dependence of Device Parameters
4.3 IV Characteristics of n- and p-channel TFT
Chapter 5 Circuit Simulation Results
5.1 Basic Transfer Curve Simulation
5.2 Inverter Circuit Simulation
Chapter 6 Conclusions
References
en_US
dc.language.isozh_TWen_US
dc.subject复晶矽薄膜电晶体zh_TW
dc.subject温度效应zh_TW
dc.subject电路模拟器zh_TW
dc.subjectpoly-silicon TFTen_US
dc.subjecttemperatureen_US
dc.subjectcircuit simulationen_US
dc.title应用于电路模拟器含有温度效应的复晶矽薄膜电晶体模式zh_TW
dc.titleA Physically-Based Poly-Silicon TFT Temperature Model for Circuit Simulationen_US
dc.typeThesisen_US
dc.contributor.department电子研究所zh_TW
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