新穎製程及新穎結構的複晶矽薄膜電晶體之可靠度研究

Abstract

本論文主要分為兩大部分 一、 新穎抗衰退複晶矽薄膜電晶體元件之製作 二、 新穎高性能複晶矽薄膜電晶體元件結構之改良

在第一部份，我們提出了將氟離子藉由沈積間隙壁的過程中一同參雜其中，即沈積氟矽玻璃來當間隙壁(Spacer)的輕量參雜結構(Light Doped Drain)薄膜複晶矽結構，來探討此元件與一般LDD結構的可靠度分析。發現此新結構具除了有較少的扭曲效應(Kink effect)外，在外加裂化時有較好的抗臨界電壓、驅動電流以及傳導電導的劣化能力，主要是因為複晶矽介面與含氟的間隙壁之間而外產生較強的矽氟鍵鍵結，不但修補掉複晶矽表面的懸浮鍵，而減少缺陷數目外，還因為矽氟鍵的鍵能較一般矽氫鍵鍵能強兩倍，更能抵抗電流離子化的撞擊而更穩定。 另一部份，我們提出了多重奈米通道結構的薄膜電晶體，發現其本身的電性效能，在電流開關比(on/off ratio)、汲極引致通道能障底落(Drain Induce Barrier Lowing)、和次臨界電導斜率(subthreshold slope)方面，較單條通道但卻具有近乎等效通道寬度的電晶體而言要好。 此外，在外加直流與交流的劣化條件下，其也在臨界電壓、驅動電流以及傳導電導方面有著優越的表現。其原因可能是由於多重通道結構具有優越的三面閘極 (tri-gate)控制能力，而能減低橫向電場所導致降低通道間的位障能而使得汲極電流上升而造成更嚴重的劣化；也可能因為由於多條通道會使得電流分流，而減低自我加熱效應(Self-Heating Effect)，此外也可能因為本身結構所鈍化曝出的表面積較多及移動率低，而降低表面缺陷和電子加速能量而使得抗劣化效果好。

This thesis can be divided into two major parts: (1) Reliability study of novel fluorinated spacers process Poly-Si TFTs (2) Reliability study of novel multiple nanowire channels structure Poly-Si TFTs In the first part, high reliability polycrystalline silicon thin-film transistors (poly-Si TFTs) with lightly-doped drain (LDD) structure were obtained by using a self-aligned fluorinated silica glass (FSG) spacer technique. The output characteristics of FSG spacer show the superior immunity to kink effect. It is also found that the degradations in Vth shifting, drain current and trans-conductance of FSG spacer after DC stress are improved. This is attributed to the passivation of fluorine ions reduces the trap states in the LDD region. Additionally, the stronger Si-F bonds also reduce the bonds broken by impact ionization. In the second part, the experiment results reveal that the novel multiple nanowire structure poly-Si TFTs has a lower DIBL, a lower SS and a higher on/off ratio than the single-channel TFT. In static and dynamic stress reliability experiments, the multiple nanowire poly-Si TFTs reduces the degradation of Vth, SS, Ion, and On/OFF ratio, compared to single-channel TFT. These high reliability results of multiple nanowire poly-Si TFTs can be explained by its robust tri-gate control and its superior channel NH3 passivation for reducing the poly-Si grain boundary defects.