氮化矽快閃記憶體可靠性量測與分析

Abstract

本篇論文主要著重於特殊類型SONOS快閃式記憶元件之可靠性議題。其中包括重複寫入/抹除之耐久性、寫入狀態之資料保存、抹除狀態之臨界電壓漂移、讀取時之元件擾動。關於可靠性議題方面，抹除狀態資料遺失被觀測到。首先，在一經過多次寫入抹除元件中，抹除狀態之臨界電壓會隨著儲存時間而漂移。此漂移與溫度呈現弱相關。臨界電壓漂移與時間的相依性，可用穿隧波前模型來做完整的描述。此外，在兩位元操作下，有著明顯的讀取擾動效應。而一正電性之氧化層電荷導致通道電子注入之解析模型，被用來闡明此讀取擾動特性。氮化矽層電荷透過氧化層缺陷導致穿隧而造成之資料遺失，在此也被描述。Frenkel-Poole散失為此最主要的機制。 另外，我們觀測到短時間因寫入動作干擾所引發的可靠性議題，並研究因隨機雜訊所引發之讀取電流不穩定，此一不穩定現象會隨著寫入/抹除次數增加和閘極長度微縮而變差。且利用通道熱電子所寫入之不均勻電荷分佈亦會擴大其效應。憑藉在本篇論文中所提及之氧化層改進方法，此種負面現象將得以舒緩。

The reliability issues of two-bit storage nitride flash memory cells including low-Vt state threshold voltage instability, read-disturb, and high-Vt state charge loss will be addressed. Program-state retention loss due to nitride charge escape via oxide trap assisted tunneling is also characterized. Frenkel-Poole emission is found to be the dominant mechanism. In addition, erase-state data loss is explored. An erase-state threshold drift with storage time is observed in a P/E cycled cell. This drift has insignificant temperature dependence. The temporal evolution of the threshold voltage drift can be well described by the tunneling front model. Furthermore, significant read-disturb effect is noticed in two-bit operation. An analytical model based on positive oxide charge assisted channel hot electron injection has been developed to explain the read-disturb behavior. Our study shows that the cell reliability is strongly dependent on operation methods and process conditions. Furthermore, program/erase cycling induced random telegraph noise in read current noise is observed. The amplitude of current fluctuation increases with P/E cycle number and with decreasing gate length. Non-uniform charge storage by CHE programming can further enhance read current fluctuation. The improvement of bottom oxide reliability can significantly reduce this effect.