電子束微影製作0.15微米T形閘極於化合物

Abstract

以電子束微影製作0.15微米T形閘極之製程已發展完成。利用兩層高/低不同靈敏度的雙層光阻系統，可製作具斜邊側壁有利於舉離的T形光阻溝槽。PMMA/P(MMA-MAA)雙層光阻系統之微影及金屬化製程參數已由實驗得出。 側邊曝光被使用來增加上層開口與下層開口的比率，T形閘極可以改善砷化鎵場效電晶體效能，因為大的金屬截面積降低了元件的閘極電阻。在最佳化的曝光及顯影條件下，PMMA/P(MMA-MAA)雙層光阻系統可製作出上下層金屬比例為7的0.15微米寬的T形閘極。此技術將可應用於高速元件上。

A process for fabricating 0.15 μm T-shaped gate using electron-beam lithography has been established. Bi-layer resist system using HI/LO sensitivity resist was used to provide T-shaped resist cavity with undercut profile suitable for lift-off process. The lithography and metallization process parameters of PMMA/P(MMA-MAA) bi-layer resist system has been determined in this work. The lateral exposure was used to increase the ratio of top layer opening to bottom layer opening. The T-shaped gate can improve GaAs FET performance because of the large cross-sectional area can reduce the gate resistance of the device. With the optimum exposure and development conditions, a 0.15 μm gate length T-shaped gate with top to bottom ratio of 7 can be obtained by PMMA/P(MMA-MAA) bi-layer resist system. The technology is applicable to compound semiconductor high-speed devices.