標題: 低溫成長之多靶交流濺度高介電係數鈦酸鍶鋇薄膜於動態隨機存取記憶體電容器之研究
High Dielectric-Constant Barium Strontium Titanate Films Deposited with RF Magnetron Co-Sputter at Low Substrate Temperatures for DRAM Storage Capacitors
作者: 黃全洲
Chuan-Chou Hwang
鄭晃忠
Huang-Chung Cheng
電子研究所
關鍵字: 高介電係數;低溫;鈦酸鍶鋇薄膜;態隨機存取記憶體;多靶交流濺度;High Dielectric-Constant;Low Substrate Temperatures;Barium Strontium Titanate Films;DRAM;RF Magnetron Co-Sputter
公開日期: 2000
摘要: 低溫成長之多靶交流濺鍍高介電係數鈦酸鍶鋇薄膜於動態隨機存取記憶體電容器之研究 研究生:黃全洲 指導教授:鄭晃忠 教授 國立交通大學 電子工程學系 電子研究所 摘 要 鈦酸鍶鋇是近年來備受矚目的材料,其提供了下列優點:高介電常數、低漏電流、良好的可靠度、優良的化性、熱穩定性及低損耗因子等。鈦酸鍶鋇薄膜被預期將被應用在未來高密度之動態隨機存取記憶體電容器上。 本論文著重於研究高介電常數材料鈦酸鍶鋇薄膜在動態隨機存取記憶體之實際應用上,所勢必面臨之問題,並找出解決之方法。必須克服的困難。 因此我們選擇使用目前晶圓廠最普遍的TiN/Ti/Si當電容器的基底,以模擬實際動態隨機存取記憶體之結構,並解決實用上勢必面臨之問題。針對實際應用之TiN阻障層,我們從電性分析、物性分析,找出了製作Pt/BST/TiN/Ti/Si 電容器的最佳條件,並作了詳細之機制探討。快速退火方式被證實能有效提昇阻障層抗氧化能力及對內擴散的阻擋能力,進一步找出最佳製程溫度條件。 在實際應用上,製程整合非常重要。製程整合的最重要要求之一,就是低溫製程。本論文之另一重點即是研究低溫製程。 本論文利用一多靶式射頻磁控濺鍍系統,在低基板溫度(T=300~350℃)下,成功地沈積具高介電常數(□r □ 350),及低漏電流(~ 10-8A/cm2 at 100kV/cm)的鈦酸鍶鋇薄膜。針對不同之薄膜沈積條件,研究其薄膜電性與物性,並分析以了解其物理機制。 本論文也研究低溫後處理對鈦酸鍶鋇薄膜的特性之影響。 我們也研究不同電漿方式處理對鈦酸鍶鋇薄膜的影響,結果顯示適當的氧電漿處理於低基板溫度(T=250℃)下能夠有效改善負偏壓漏電流特性。 最後,本論文研究準分子雷射退火處理在鈦酸鍶鋇薄膜應用上之影響。我們從光學特性量測電磁波傳導以及電性、物性分析,詳細探討鈦酸鍶鋇薄膜準分子雷射退火處理之機制。利用248nm準分子雷射退火,成功的將一射頻磁控濺鍍系統於極低溫(T<150°C)下成長之非晶薄膜鈦酸鍶鋇於低基板溫度(T=300℃)下熔融-再結晶,而達到高結晶性、高介電常數值(□r >398)、低漏電流(~ 2x10-8A/cm2 at 100kV/cm) 的優良特性。
High Dielectric-Constant Barium Strontium Titanate Films Deposited with RF Magnetron Co-Sputter at Low Substrate Temperatures for DRAM Storage Capacitors Student : Chuan-Chou Hwang Advisor : Dr. Huang-Chung Cheng Department of Electronics Engineering and Institute of Electronics National Chiao Tung University Abstract Barium strontium titanate (BST) films with a high dielectric constant have attracted great attention for practical use in the capacitors of giga era dynamic random access memory (DRAM). The structure of Pt/BST/Pt/TiN/Ti/Si was employed in this thesis to simulate the practical capacitor over bit-line (COB) DRAM’s capacitor structure. Experimental results showed that rapid thermal annealing (RTA) of TiN barrier layers could enhance the resistance against inter-diffusion between the BST films and Si substrates and the oxidation of the barrier during BST deposition. The process integration of high density DRAM must focus on how to implement high crystallized, high □r thin BST films at low temperature. In this thesis, high dielectric-constant (□r □ 350) and low leakage current (~10-8A/cm2) thin BST films were successfully deposited at low substrate temperatures (T=300~350℃) with utilizing a RF magnetron co-sputter system. The physical and electrical properties of BST films deposited with different deposition parameters were investigated in order to realize the associated mechanism. We also studied the effects of post treatment on the characteristic of BST films. First, BST films were treated with different plasma and the results showed the improved leakage current at negative bias. The optimum leakage characteristics at negative bias are therefore demonstrated in BST thin films deposited at proper gas pressure with O2 plasma post-treatments. Furthermore, wavelength 248 nm excimer laser post annealing (ELA), has been undertaken to implement low process BST. The amorphous-like BST film deposition at low substrate temperature (150°C) was successfully melted and recrystallized. dielectric constant as high as 398 were achieved for the amorphous BST films treated with ELA at low substrate temperature (300℃). The leakage current density was as low as 2x10-8 A/cm2 under a electric field of 100kV/cm. The physical and electrical properties of BST films annealed with different parameters were investigated. The detailed physical mechanisms of excimer laser annealing on BST thin films were also studied.
URI: http://140.113.39.130/cdrfb3/record/nctu/#NT890428016
http://hdl.handle.net/11536/67086
Appears in Collections:Thesis