類比/數位整合之無線多模式發射端設計

Abstract

以2.4GHz ISM頻段無線通訊收發機為考量，本論文嚐試著實現一個多模調變處理器(Multimode Modulator Processor)，此多模調變處理器是依據藍芽(Bluetooth)與全球電子電機工程師協會(IEEE) 802.11b無線通訊網路(WLAN)兩種規格設計實現的。此多模調變處理器包含了四種不同的數位調變方式，包含有高斯頻率移鍵(GFSK)、差動相位移鍵(DPSK) 、互補編碼鍵(CCK) 、封包二進制迴旋編碼(PBCC)。 這篇論文提出了一種無線通訊系統模擬模組化的設計方法論以解決規格演化所需要的適應性與可重新設定性。基於單晶片(SOC)的需求，它能夠加速射頻(RF)-基頻(BB)的共同模擬速度。為驗證這種設計方法論，在0.25微米互補式金氧半場效電晶體(CMOS)製程中將多模調變處理器加以實現。

A multimode modulator processor is implemented for 2.4GHz ISM band wireless transceivers. The target specifications being converged are Bluetooth, IEEE 802.11b 2Mbps/11Mbps. The modulator consists of four kinds of digital modulation schemes including gaussian frequency shift keying (GFSK), differential phase shift keying (DPSK), complementary code keying (CCK) and phase binary convolutional code (PBCC). Toward flexibility and reconfigurable design for standard migration, an efficient design methodology for wireless system simulation is proposed. Based on the demand of system-on-a-chip (SOC), the methodology can improve the efficiency of RF-BB co-simulation. Circuit specifications are evaluated under RF-embedded SOC design. Implementations with 0.25 um CMOS had been achieved for performance back annotation.