完整後設資料紀錄
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dc.contributor.author劉祥麒en_US
dc.contributor.authorHsiang-Chi Liuen_US
dc.contributor.author徐文祥en_US
dc.contributor.authorWensyang Hsuen_US
dc.date.accessioned2014-12-12T02:26:04Z-
dc.date.available2014-12-12T02:26:04Z-
dc.date.issued2000en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT890489019en_US
dc.identifier.urihttp://hdl.handle.net/11536/67518-
dc.description.abstract本論文研究方向主要包含有ASE 製程的參數討論及微流道的製程發展。ASE製程的參數討論方面,經由系統化的實驗,對各個參數及互相的交互作用做探討,在蝕刻速率上達到每分鐘3 μm,垂直度90±0.5°。另外在表面粗糙度上,可以將粗糙度縮減至10nm並且保有良好的結構輪廓。這方面的研究可以廣泛運用在各式的微系統元件設計上,包含光學元件,微制動器,及微感測器的運用。 微流道的製作方式是採用自BCT改良的製程。將流道的製程縮減,只需在ICP中完成流道輪廓,最後再以CVD完成封閉既可。如此一來,可以減少製程時間,並且可以對流道的尺寸做不同的調整。zh_TW
dc.description.abstractTwo subjects are performed in this paper. First, systematical experiments are designed to study the fabrication parameters in Advanced Silicon Etch (ASE) process. Second, an improved fabrication process of sealed micro-channel is carried out with the STS ICP-RIE system. For the ASE process, systematical experiments are designed to study the effects under various parameters. Silicon etching rate about 3 μm/min and perpendicularity about 90±0.5° are reached in this study. In addition, sidewall roughness can be down to 10 nm rms and process can maintain at high etching rate about 2.5 μm/min. These achievements can be widely used in MEMS applications like optical devices, microfluidic applications, micro-actuators, and micro-sensors. For the micro-channels process, it can shorten the process step, and various channel sizes can be formed by various trench depth. The advantage of non-bonding process can be easily to combine with other applications.en_US
dc.language.isoen_USen_US
dc.subject誘導耦合電漿zh_TW
dc.subject微流道zh_TW
dc.subject表面粗糙度zh_TW
dc.subjectICP-RIEen_US
dc.subjectmicro channelen_US
dc.subjectsurface roughnessen_US
dc.titleICP-RIE的製程研究及封閉型微流道的製作zh_TW
dc.titleParameters study in ICP-RIE and Fabrication of Sealed Micro-Channelsen_US
dc.typeThesisen_US
dc.contributor.department機械工程學系zh_TW
顯示於類別:畢業論文