MPEG-4材質編碼器之架構設計與實現

Abstract

在本論文中，我們提出了一個MPEG-4材質編碼(texture coding)架構設計，適合用於目前的多媒體視訊應用。材質編碼是MPEG-4視訊編碼中重要的環節，用於去除空間與頻率領域的冗餘資料並進行壓縮編碼，可以有效地降低儲存視訊內容所需的空間，在較低頻寬的網路環境下，提供良好畫質的視訊傳輸。材質編碼的部分包括了離散餘弦轉換(Discrete Cosine Transform)、量化(Quantization)、反量化(Inverse Quantization)、反轉離散餘弦轉換(Inverse Discrete Cosine Transform)以及交流直流預測(AC/DC prediction)。首先，我們採用DCT、IDCT交替的排程方式來處理影像中單一巨集區塊(Macroblock)，利用運算處理單元共用的方式，有效地減少硬體面積以及節省運算處理所需的時間，再者，我們使用行列分解的技術來降低二維DCT/ IDCT的運算複雜度，能夠利用簡便的訊號控制同一硬體架構進行DCT或是IDCT運算，所提出的演算法能有效地減少乘法運算元並且符合IEEE所制定的IDCT精確度要求。此外，在整個材質編碼器前端，亦設計一個ping-pong緩衝區，使得材質編碼器的運作能夠管線(pipeline)進行，安全且正確地讀取資料進行編碼，達到較佳的編碼效能。我們所提出的材質編碼架構適用於即時視訊壓縮，可以支援MPEG-4 Simple Profile Level 3標準的位元流編碼。 所提出的材質編碼架構在影像大小為CIF的格式下，處理單一巨集區塊的時間為1137個時間週期，透過UMC 0.18製程技術合成，最大操作頻率為43MHz，邏輯閘總數為54,405個，使用16,840位元的內部記憶體，此外，能夠輕易的整合進MPEG-4編碼器中，並且適用於行動通訊應用。

An efficient architecture for MPEG-4 texture coding is proposed in this thesis. The architecture consist 2D-DCT/IDCT, quantization, AC/DC prediction block, inverse quantization and ping-pong buffer. It is designed to handle a macroblock data within 1137 cycles and is suitable for MPEG-4 video encoder computing CIF (352x288) image formats. The cost-effective VLSI architecture for two-dimensional 2D DCT/ IDCT is based on the row-column decomposition technique. The 2D DCT/IDCT has a regular structure which will be interconnect and control simply, and the implementation of the inverse transform can use the same hardware efficiently. In addition, the proposed 2D IDCT algorithm used only four parallel multipliers and conforms to the accuracy specification of IEEE standard 1180 -1990. Furthermore, an efficient block engine with the interleaving DCT/IDCT scheduler is achieved for scheduling DCT, quantization, inverse quantization, IDCT, and AC/DC prediction in order to reduce the hardware cost and processing time. Besides, an additional ping-pong buffer is carried out to generate two independent addresses for reading and writing at the same time. Therefore, all the data in the buffer can be read safely and correctly. A typical MPEG-4 Simple Profile Level 3 sequence can be encoded in real-time with the proposed texture coding module. The proposed design has been synthesized by using 0.18-um CMOS technology. The simulation results indicate that MPEG-4 texture coding can run at a maximum frequency of 43 MHz and it contains 54,405 gates and 16,840 bits memory. In addition, our texture coding engine can be integrate into the entire MPEG-4 encoder easily, and it suitable for mobile communication applications.