以PECVD介電薄膜之性質及崩潰電場分佈

Abstract

利用PECVD鍍製氮化矽已經廣泛的被研究於IC的後段製程中。在本篇論文以PECVD鍍製MIM結構電容的介電層會有電滯現象(hysteresis effect)與頻率散佈效應(frequency dispersive effect)，進行電漿處理後可以消除電滯現象，這是因為減少介電層中的Si-(dangling bond)。量測不同面積的MIM結構電容的崩潰電場，可以發現當電容面積越大，所得到的崩潰電場也越小，這可以利用weakest-link model來解釋，如果介電層經過電漿處理可以使介電層的崩潰機率較為一致，而可計算得到它的崩潰機率，經過電漿處理的氮化矽電容崩潰機率為0.004308，以二氧化矽為介電層的MIM電容結構為0.001206。對於電容的高頻量測是利用floating結構電容，電極的長度，與下探針的點，與不同的電極厚度對於電容的阻抗都會造成影響。

Abstract Dielectric thin films deposited by PECVD have been intensively researched in the IC back-end process. In this study, metal-insulator-metal capacitors using PECVD nitride suffer from frequency dispersive effects and hysteresis effects. After plasma treatment, we can reduce hysteresis effects because the number of Si-(dangling bond) decreases. Breakdown field distributions are influenced by capacitor area. When capacitor area increases, the breakdown field decreases. It can be explained by weakest-link model. If the dielectric thin films are treated by plasma, the breakdown probability becomes uniform. So we can get p=0.004308 of plasma treated silicon nitride and p=0.001206 of plasma treated silicon dioxide. At high frequency, we measured S parameter of the capacitors. Finally, impedances of the floating capacitors are influenced by length and thickness of the electrodes.