選擇性沉積鎢汲極源極複晶矽薄膜電晶體之製作與研究

Abstract

在本論文中，我們利用選擇性化學氣相沉積鎢的技術將鎢金屬沉積於複晶矽薄膜電晶體的汲極源極上，以便有效降低薄通道複晶矽薄膜電晶體汲極源極的串聯電阻。和沒有沉積鎢金屬的傳統薄通道複晶矽薄膜電晶體相比較，本實驗所製作的選擇性沉積鎢汲極源極複晶矽薄膜電晶體（簡稱為 鎢-薄膜電晶體）具有較高的導通電流，較佳的電流飽和曲線，同樣優越的臨界電壓和次臨界波動，以及同樣低的漏電流。 除了降低汲極源極串聯電阻，本實驗還研究通道厚度和輕摻雜汲極（LDD）結構對鎢-薄膜電晶體特性的影響，結果發現超薄通道(300 Å)的鎢-薄膜電晶體因為減少了基極中性區域的大小，所以可以比厚通道元件更有效地抑制浮動基極效應（floating body effect）；另外，具有輕摻雜汲極結構的鎢-薄膜電晶體也因為降低了汲極端電場強度而可以擁有較低的漏電流和較輕微的轉折效應(kink effect)。為了更進一步了解元件抑制短通道效應的情形，我們還比較了不同通道長度的元件特性，並在分析不同元件臨界電壓隨通道長度縮短而下降（threshold voltage roll-off）的情形時，發現超薄通道輕摻雜汲極鎢-薄膜電晶體臨界電壓下降程度比傳統電晶體的輕微，這或許是因為鎢覆蓋源極排除基極電流的能力較強，所以也就進一步抑制了浮動基極效應。 本實驗中，長通道鎢-薄膜電晶體也被發現適合應用在高電壓操作的顯示器周邊電路上，尤其是薄通道輕摻雜汲極鎢-薄膜電晶體雖然擁有比厚通道元件低的導通電流，卻因為它抑制了浮動基極效應而有較佳的飽和曲線，所以在萃取輸出阻抗以及電壓增益後發現，它反而具有最優越的表現。 本實驗成功研製出新穎選擇性沉積鎢汲極源極複晶矽薄膜電晶體，它不但具有良好的特性，而且製程溫度低、結構簡單，更重要的是它可以和目前發展的頂閘極複晶矽薄膜電晶體技術相容，相信能應用於未來低溫複晶矽薄膜電晶體的顯示器當中。

In this study, we have fabricated and characterized tungsten-raised source/drain polycrystalline silicon thin film transistors (W-TFTs). Tungsten film is selectively deposited at 300 ºC on an exposed poly-Si source/drain region to form a raised source/drain structure. As a result, the parasitic source/drain resistance is greatly reduced, and the drain current is dramatically improved as compared to conventional oxide-spacer counterpart. To suppress the floating body effect, W-TFTs with ultrathin channel thickness (30 nm) are also fabricated. While compared to W-TFTs with 50-nm-thick channel, ultrathin channel W-TFTs have less pronounced kink effect. In addition, ultrathin channel W-TFTs with LDD (Lightly-Doped Drain) can further decrease the OFF current since the electric filed near the drain side is reduced. The threshold voltage roll-offs are also studied by analyzing characteristics of W-TFTs with different channel lengths. It is found that the threshold voltage roll-off of W-TFTs with ultrathin channel and LDD structure is less pronounced than that of their conventional counterparts. This may be due to easily repelling of body current for W-clad source and thus suppressing the floating body effect. To serve as AMLCD peripheral circuits, device performances under high voltages are also investigated. Compared to 50-nm-thick channel conventional TFTs with or without LDD structure, ultrathin channel LDD W-TFTs are found to have superior output resistance and voltage gain despite their low driving current. We have proposed a new poly-Si TFT structure with W-raised source/drain. The structure is simple and compatible with conventional low-temperature poly-Si (LTPS) processing, and can readily be applied to future LTPS fabrication.