AMR編碼效能分析及Viterbi解碼器於數位訊號處理器之實現

Abstract

近年來，多媒體與無線通訊已成為市場的主要發展方向，對消費者而言，面對不同的應用需求，也衍生出不同的傳輸品質要求。因此，如何在既有的傳輸通道上，將各種不同的應用與網路的傳輸保護作整合性的規範，並保持傳輸品質的穩定，已成為研究趨勢之一。在另一方面，因應資訊產品週期日益縮短，如何將不同的應用利用現有的數位訊號處理器來實現也成為另一個值得探討的課題。 在論文中，我們將介紹第三代無線通訊系統所採用的語音編碼標準「適應性多速率編碼」，在這新一代的語音標準中引進了訊源與通道聯合編碼的概念。我們將簡單的描述標準內部演算法與編碼的架構，並詳述訊源與通道編碼的整合方式，包括非等同性保護(Unequal Error Protection)、多重比例保護碼(Multi- rate protection)、對角式交錯排序(diagonal block interleaver)等，並針對不同特性的通道條件進行效能評估。另外我們選擇頻譜差異分析作為語音品質的量度參考，並根據量測數據指出現有標準未盡周詳的疏漏之處，最後並將針對其中表現較為特殊的模式進行理論上的分析和深入的解釋。 除此之外，我們利用德州儀器公司所發展的數位訊號處理器為平台，在之上進行Viterbi 解碼器的實現，在這裡我們的焦點主要集中在整體演算法的執行速度及程式所需要的記憶體空間。我們會先簡單的描述整體硬體架構的設計及運作模式，另外，我們也將介紹程式編譯器所採用的編譯技術。我們同時也將整個程式最佳化的流程作詳細的舉例說明，並提供在程式寫作風格(coding style)上需要注意的地方，並得到相當程度的效能提升。我們也將從編譯器所提供的相關資訊作進一步的程式分析，並瞭解整體程式如何實際在數位訊號處理器上運作。最後我們證明能夠有效的提升整體執行速度為原先的二十倍。

Multimedia and wireless communication have been the two high tech main streams in the recent years. Consumers are demand ing for better QoS (Quality of Service) in a variety of applications. A related research topic is the possibility of joint source/channel coding that provides a way to overcome the channel fading while it still keeps the service quality above a certain level. DSP implementation is another issue in practical applications. It is a quick time-to-market solution for industry; however, we need to tune the DSP algorithms to overcome its speed and structure limitations. One focus of this thesis is AMR (Adaptive Multi Rate), the speech standard of 3GPP. One of its features is that it takes the channel condition into account in its design. We will describe the basic structure of the AMR speech and channel coder and how they are combined together. We then show the simulation results of the AMR under various channel conditions. Here, SD (Spectral Distance) is chosen to be our methodology for speech quality assessment. We identified the problems of some AMR modes (12.2 and 7.95 kbit/s) operated in a noisy environment. Further, we try to give the reasons why these codecs do not have robust performance under noisy channel conditions. Finally, we conclude that the simulation results indicate that all the other modes have similar reconstructed speech quality except for the modes of 12.2 and 7.95 kbits/s. There is no apparent advantage in selecting a specific coding mode based on the channel error condition. The second focus of this thesis is DSP implementation. We implement the Viterbi decoder on the Texas Instrument (TI) TMS320C6701 digital signal processor (DSP). The trade-off between code size and speed is our focused point. After a brief review of the DSP hardware architecture and its software tools, we will show how we optimize the source program step by step and finally achieve a significant improvement on speed and/or code size. Then, we analyze the feedback from the DSP compiler and examine the flow of the algorithm executed on the DSP. At the end, the optimized version runs 23 times faster than the un-optimized one.