完整後設資料紀錄
DC 欄位語言
dc.contributor.author陳世璋en_US
dc.contributor.authorShih-Chang Chenen_US
dc.contributor.author羅正忠en_US
dc.contributor.author張鼎張en_US
dc.contributor.authorJen-Chung Louen_US
dc.contributor.authorTing-Chang Changen_US
dc.date.accessioned2014-12-12T02:30:44Z-
dc.date.available2014-12-12T02:30:44Z-
dc.date.issued2002en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT910428087en_US
dc.identifier.urihttp://hdl.handle.net/11536/70417-
dc.description.abstract根據半導體的微縮定律,隨著半導體製造逐漸的微小化,極薄的二氧化矽介電層將伴隨著極大的直接穿遂漏電流,而這個直接穿遂漏電流將對元件的功率消耗有嚴重的影響。在閘極二氧化矽介電層薄到10奈米以下的情況之下,為了解決這嚴重的直接穿遂漏電流現象,我們將利用高介電係數材料來替換傳統的二氧化矽。我們利用高介電係數材料在相同的等效二氧化矽厚度之下,能擁有較大的實際物理厚度以抵擋直接穿遂漏電流。 在眾多高介電係數材料之中,二氧化鉿是一種非常有潛力的高介電係數材料。它有較高的介電係數,足夠高的載子能障,以及在製程上能有著良好的穩定性。在我們的實驗過程中,我們發現二氧化鉿在實驗中所展現的一些特性及現象,這些包括了:漏電流的趨勢變化,電容-電壓電性分析上的平台現象,界面層增生的問題,以及在電性逼迫之後,發生電子在介電層中被補陷的現象。實驗中另一類的試片,是在成長二氧化鉿薄膜之前,我們先使用了快速熱成長氧化層或高溫下(800℃)的氨氣來對矽晶片做表面的處理。我們發現這兩種表面處理都能改善試片在電容-電壓電性分析上的平台現象,其中高溫下的氨氣表面處理更可以降低試片的漏電流。 而在SILC的電性逼迫測試之下,我們發現電子在介電層中被補陷的程度會隨著逼迫時間的累積而越來越嚴重。有先經過快速熱成長氧化層處理的話,其介電質的可靠度將會變得較佳。另外在結構上,若高介電常數材料與矽基板之間有一層界面薄膜層的話,這層界面薄膜層的品質優劣將決定整個介電層崩潰的臨界極限。在HfO2薄膜內的漏電傳導機制是由Frenkel-Poole發射所主導的。zh_TW
dc.description.abstractAccording to the scalling rules, aggressive scaling has led to silicon dioxide (SiO2) gate dielectrics as ultra thin in state-of-the-art CMOS technologies. As a consequence, static leakage power due to direct tunneling through the gate oxide has been increasing at an exponential rate. As technology roadmaps call for sub-10Å gate oxides within the next five years, a variety of alternative high-k materials are being investigated as possible replacements for SiO2. The higher dielectric constants in these materials allow the use of physically thicker films, potentially reducing the tunneling current while maintaining the gate capacitance needed for scaled device operation. Hafnium oxide ( HfO2 ) is the most potential high-k material. It has the higher dielectric constant , higher barrier height ( 1.6eV for electrons , and 3.4eV for holes ), and excellent stability. In our experiments, the variation of leakage current , hump in C-V curves, interfacial layer increasing, and electron trapping are observed and investigated in un-surface treatment HfO2 samples. The rapid thermal oxide ( RTO ) and NH3 surface treatments both can improve the C-V curves. Moreover, the lower leakage current is observed in NH3 surface treatment samples. The results of stress induces leakage current ( SILC ) measurements show the severe electron trapping under the high electric field stress. The reliabilities can be improved by the RTO surface treatment, and the dielectric breakdown much depends on the quality of the interfacial layer. The conduction mechanism in the HfO2 thin film is dominated by the Frenkel-Poole emission.en_US
dc.language.isozh_TWen_US
dc.subject高介電zh_TW
dc.subject二氧化鉿zh_TW
dc.subjecthigh-ken_US
dc.subjectHfO2en_US
dc.title高介電常數材料二氧化鉿在矽基板上之介面特性研究zh_TW
dc.titleThe Interface Investigation of High-K Material HfO2 on Si Substrateen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
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