高低壓混合輸入輸出介面之設計

Abstract

在本篇論文中，有三種高低壓混合之輸入輸出介面被提出：利用薄氧化層以及動態N＋井區偏壓實現之高低壓混合輸入輸出介面，藉由N型金氧半導體阻擋所保護之高低壓混合輸入輸出介面，以及為PCI-X設計之高低壓混合輸入輸出介面。 為了改善一些之前的高低壓混合輸入輸出介面，本篇論文中發明了利用薄氧化層以及動態N＋井區偏壓實現之高低壓混合輸入輸出介面。它較之前的設計簡單，而且如果其中的N型與P型驅動金氧半導體之尺寸相同，這個新的設計也會有較佳的驅動能力。藉由N型金氧半導體阻擋所保護之高低壓混合輸入輸出介面則和之前的設計均不相同。藉由這個新的想法，可容忍三倍於正常工作電壓之高低壓混合輸入輸出介面將可被實現出來。因為這個設計需要一組電荷幫浦電路，故設計出了在低壓製程中可解決閘極氧化層可靠度問題之電荷幫浦電路。而為PCI-X設計之高低壓混合輸入輸出介面對於現今CMOS電路設計則相當的實用。藉由這個設計，電路設計者可以使用1伏之元件來達成高速效能且低功率消耗之目的，而不需受到3.3伏PCI-X匯流排之限制。

In this thesis, three kinds of mixed-voltage I/O interfaces are presented, the mixed-voltage I/O interface with only thin oxide devices and dynamic n-well bias, the mixed-voltage I/O interface protected by blocking NMOS, and the mixed-voltage I/O interface for PCI-X. The new mixed-voltage I/O interface with only thin oxide devices and dynamic n-well bias is invented in this work to improve some drawbacks of the prior one. It is simpler and has higher driving ability if the driving NMOS and PMOS have the same size. Mixed-voltage I/O interfaces protected by blocking NMOS are different from the prior design. Due to this idea, the mixed-voltage I/O interface tolerating to the I/O pad signal with triple voltage level of the nominal supply voltage can be realized. Because the mixed-voltage I/O interface protected by blocking NMOS needs a charge pump circuit, the charge pump circuit dealing with gate-oxide reliability issue in low voltage processes is designed. And the mixed-voltage I/O interface for PCI-X is very practical in modern CMOS circuit design. With this design, a circuit designer can use 1V devices to achieve high speed performance and low power consumption and not be limited to the 3.3V PCI-X bus.