完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 曾暉洸 | en_US |
dc.contributor.author | Hui-Kuang Tseng | en_US |
dc.contributor.author | 高曜煌 | en_US |
dc.contributor.author | Yao-Huang Kao | en_US |
dc.date.accessioned | 2014-12-12T02:30:59Z | - |
dc.date.available | 2014-12-12T02:30:59Z | - |
dc.date.issued | 2002 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#NT910435075 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/70609 | - |
dc.description.abstract | 本論文旨在使用金氧半製程研究一免於受到基底與電源雜訊干擾的高速環路振盪器,利用差動式PMOS架構與偏壓電路可減少基底與電源的影響。基於此改良的環路振盪器進而利用TSMC 0.25微米金氧半製程實現一低雜訊GHz鎖相迴路式振盪器,並進一步設計出一應用於歐規868MHz短距離無線通訊裝置之發射晶片,此發射晶片具備FSK/ASK/FM調變功能,符合EN 300 220-1規範中對於訊號諧波的要求。 | zh_TW |
dc.description.abstract | The purpose of this study is to investigate the high-speed ring oscillator using CMOS process. The phase noise of output signal is often degraded by substrate and source noise. A novel bias circuit with only PMOS device is presented to reduce the influence from substrate and source noise. Accordingly, a GHz PLL based on ring oscillators is developed. And then a transmitter chip based on the phase-locked loop is realized for the European 868MHz short range devices (SRDs). The transmitter chip is featured with FSK/ASK/FM modulation and satisfies the regulation of harmonics under EN 300 220-1 standard. The entire circuit is fabricated using the TSMC 0.25um CMOS process. | en_US |
dc.language.iso | zh_TW | en_US |
dc.subject | 環路振盪器 | zh_TW |
dc.subject | 鎖相迴路 | zh_TW |
dc.subject | 發射晶片 | zh_TW |
dc.subject | ring oscillator | en_US |
dc.subject | phase-locked loop | en_US |
dc.subject | transmitter chip | en_US |
dc.title | 無線通訊發射晶片中高速環路振盪器之研究 | zh_TW |
dc.title | Study on High Speed Ring Oscillators in Transmitter Chip for Wireless Communication | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 電信工程研究所 | zh_TW |
顯示於類別: | 畢業論文 |