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dc.contributor.authorMa, Ming-Wenen_US
dc.contributor.authorChiang, Tsung-Yuen_US
dc.contributor.authorChao, Tien-Shengen_US
dc.contributor.authorLei, Tan-Fuen_US
dc.date.accessioned2014-12-08T15:09:16Z-
dc.date.available2014-12-08T15:09:16Z-
dc.date.issued2009-07-01en_US
dc.identifier.issn0268-1242en_US
dc.identifier.urihttp://dx.doi.org/10.1088/0268-1242/24/7/072001en_US
dc.identifier.urihttp://hdl.handle.net/11536/7085-
dc.description.abstractIn this communication, a high-performance p-channel low-temperature poly-Si thin-film transistor with HfO(2) gate dielectric and nitrogen ion implantation is demonstrated for the first time. A low threshold voltage V(TH) = -0.8 V, excellent subthreshold swing S.S. = 0.123 V/decade, high field effect mobility mu(FE) = 64.14 cm(2) V(-1) s(-1) and high driving current I(Dsat) = 9.14 mu A mu m(-1) @ 3 V operation voltage of the p-channel LTPS-TFT can be achieved. The high performance characteristics are attributed to the very low effective oxide thickness EOT = 8.4 nm provided by the HfO(2) gate dielectric and the passivation of effective interface states and grain boundary traps by the nitrogen ion implantation treatment. It would be very suitable for the application of a high-speed and low-power pixel-driving device in flat-panel displays.en_US
dc.language.isoen_USen_US
dc.titleHigh-performance p-channel LTPS-TFT using HfO(2) gate dielectric and nitrogen ion implantationen_US
dc.typeArticleen_US
dc.identifier.doi10.1088/0268-1242/24/7/072001en_US
dc.identifier.journalSEMICONDUCTOR SCIENCE AND TECHNOLOGYen_US
dc.citation.volume24en_US
dc.citation.issue7en_US
dc.citation.spageen_US
dc.citation.epageen_US
dc.contributor.department電子物理學系zh_TW
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electrophysicsen_US
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
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