標題: | 高頻覆晶構裝散熱最佳化設計 An Analysis for an Optimal |
作者: | 趙自皓 Chao Tzu-Hao 林振德 Jenn-Der Lin 機械工程學系 |
關鍵字: | 電子封裝;覆晶封裝;電子散熱;散熱設計;同軸式覆晶封裝;Flip chip package;thermal design;co-axial flip chip |
公開日期: | 2004 |
摘要: | 隨著科技的快速發展,電子產品朝向小型化且多功能的目標邁進,因此設計出擁有高散熱能力產品的挑戰伴隨而來。本研究以計算流體力學的方法,針對III-V族高頻通訊(HEMT)積體電路電子覆晶構裝( Flip Chip Package )的熱傳現象進行模擬;考慮之電子構裝包括了傳統(Traditional)的覆晶構裝及新提出的同軸式(Co-Axial)覆晶構裝設計;本文針對此二種不同形式,並配合於封裝體內與封裝體外設計多種不同形式下探討其散熱的效益,並且經過系統化的分析與歸納,俾求得低熱阻目標的最佳散熱設計。
分析結果顯示:於微米尺寸設計時,材料對於封裝體內部的影響最劇,且線路的厚度在有限尺寸下將其設為8 對熱的散逸有比較好的效果,而散熱通孔的設計則因為個數上的限制對溫度的影響有限。在同軸式覆晶外部設計封裝上,在金屬蓋上加上一基底為2500 x2500 x1500 ,鳍片高度、厚度及間距分別為500、100 及166 的熱沈;並於測試入口處加入一 5 m/s 的強制對流時,此時封裝體擁有最佳的散熱效果。 In this study, the computational fluid dynamics approach is employed to simulate and analyze the heat transfer for III - V group high frequency (HEMT) electronic flip chip package. Considered packages include the traditional type flip chip package, and the co-axial flip chip package. In order to obtain an optimal design for those two kinds of different forms package, we examine the effects of various parameters. The results show that at the microns scale the material is the most important factor and significantly influence the heat dissipation. In addition, circuits under the size of 8 microns thickness can dissipate heat more effectively, while the effect at the temperature is limited by the vias’s design because the number of vias is limited. For the co-axial flip chip package, we cover a metal lid in the crystal and add a heat sink with basis of 2500 x2500 x1500 . Analysis shows that the package has the optimal heat transfer at the fin’s altitude, thickness and spacing of 500, 100 and 166 , respectively, associated with 5 m/s force convection in the test entrance. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#GT009214560 http://hdl.handle.net/11536/71569 |
Appears in Collections: | Thesis |
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