完整後設資料紀錄
DC 欄位語言
dc.contributor.authorWu, Chung-Yuen_US
dc.contributor.authorHsu, Shun-Weien_US
dc.contributor.authorWang, Wen-Chiehen_US
dc.date.accessioned2014-12-08T15:09:32Z-
dc.date.available2014-12-08T15:09:32Z-
dc.date.issued2007en_US
dc.identifier.isbn978-1-4244-0920-4en_US
dc.identifier.issn0271-4302en_US
dc.identifier.urihttp://hdl.handle.net/11536/7290-
dc.identifier.urihttp://dx.doi.org/10.1109/ISCAS.2007.378770en_US
dc.description.abstractA new 24-GHz CMOS current-mode power amplifier in 0.13-mu m CMOS technology is proposed. By using the two-stage cascade current-mirror structure, the power amplifier has a maximum output power of 17.8 dBm, the 0P(1dB) of 13.8 dBm and the power gain of 23 dB under the supply voltage of 1.2V and the total power dissipation of 239 mW. As compared to other PAs at 17 similar to 24 GHz the proposed current-mode PA has the highest power added efficiency (PAE) of 34.6% and the largest output power.en_US
dc.language.isoen_USen_US
dc.titleA 24-GHz CMOS current-mode power amplifier with high PAE and output poweren_US
dc.typeArticleen_US
dc.identifier.doi10.1109/ISCAS.2007.378770en_US
dc.identifier.journal2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11en_US
dc.citation.spage2866en_US
dc.citation.epage2869en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000251608403169-
顯示於類別:會議論文


文件中的檔案:

  1. 000251608403169.pdf

若為 zip 檔案,請下載檔案解壓縮後,用瀏覽器開啟資料夾中的 index.html 瀏覽全文。