標題: | 一個低功率且高準確度的電容感測電路及其應用 A Low Power and High Accuracy Capacitive Sensing Circuit and its Applications |
作者: | 楊宇滔 Yang, Yu-Tao 李鎮宜 Lee, Chen-Yi 電子工程學系 電子研究所 |
關鍵字: | 電容感測;實驗室晶片;濕度感測;讀出電路;Capacitive sensing;Lab on chip;Humidity sensing;Readout circuit |
公開日期: | 2013 |
摘要: | 在本篇論文中,我們提出了一個應用於實驗室晶片(LoC)偵測與濕度感測的新型低功率且高準確度的差動電容感測電路,這個電路能將輸入的差動電容值轉換成一個數位的輸出。為了去克服因為製程、電壓與溫度 (P-V-T)的變異,而造成的電路不準確,我們提出一個新想法,藉由取比例值的方式來解決由於製程、電壓與溫度變異所產生的問題。另外我們的電路還包含一個校準模組,其設計的目的是為了消除由於元件不匹配所產生晶片與晶片之間的變異。我們也設計一個友善的使用者介面,利用它我們可以達到即時的量測,而且能將目前的電容值顯示在螢幕上。我們使用台積電0.35µm CMOS製程,將這個電路實作在三顆晶片上,並且應用於實驗室晶片偵測與濕度感測。在量測結果中顯示,與目前技術發展水平相比,我們的設計有明顯較好的能源使用效率,以及較優越的線性度。 In this thesis, a novel low power and high accuracy differential capacitive sensing circuit which is applied for Lab on chip (LoC) detecting and humidity sensing is proposed. This circuit transduces the input of differential capacitance to the output of a digital code. To overcome the P-V-T variations which cause the inaccuracy of circuit, we use a novel idea which is taking the proportion to solve the P-V-T problems. Besides, a calibration module is included in the proposal. This module is designed to cancel the die-to-die variations which are produced by the device mismatching problem of the device. We also design a friendly user interface, which achieves a real-time measurement and displays current capacitance value in the monitor. The circuit has been implemented in three chips, and they are fabricated in the process of TSMC 0.35µm CMOS technology for the application of LoC detecting and humidity sensing. The measurement results show that our designs perform a significantly better energy-efficiency and superior linearity than the state-of-the-arts. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#GT070050236 http://hdl.handle.net/11536/73102 |
Appears in Collections: | Thesis |