以準分子雷射退火製作雙閘極無接面多晶矽薄膜電晶體之特性研究

Abstract

近年來為了解決熱擴散的問題，無接面場效應電晶體(Junctionless Flield Effect Transistor, JLFET)的概念已被提出。所謂無接面電晶體即通道中含有高濃度的參雜，而通道的參雜濃度與類型皆與源極、汲極是相同的。如此即可完全忽略在傳統電晶體中所需控制的接面形貌，而能解決熱預算的問題。在本論文中將使用自我參雜之多晶矽的沉積技術(in-situ doped poly-Si deposition)搭配準分子雷射對通道層做退火處理的雙閘極無接面薄膜電晶體的製作。利用雙閘極的結構以提升電晶體之操作特性且避免製備超薄通道的困難，並對無接面薄膜電晶體之特性以不同通道厚度及參雜濃度進行設計與探討。 本論文在無接面元件電特性中的探討，首先以雙閘極與單一閘極的無接面薄膜電晶體的比較，可以發現在雙閘極的元件有著160 mV/dec的次臨界擺幅(subthreshold swing)，比起單閘極的329 mV/dec有著較佳的轉換特性。因此雙閘極的結構確實是能夠有效提升閘極控制力與元件開關特性，使無接面電晶體特性表現達到較佳效能。另外在雷射退火效應對於元件特性的討論中，本論文發現經由不同雷射能量退火後，元件電特性的差異並不明顯。乃因通道結晶性受限於通道厚度太薄，使得抑制通道中的晶粒邊界(grain boundary)之效果不顯著，因而沒有看見整體電特性有提升的趨勢。在調控通道中不同參雜濃度對於電特性的研究上，可發現主要現象在於導通電流大小變化與開關電流的比率變化。在較高參雜濃度的通道會有著較大的導通電流，相對於較低參雜濃度的通道所表現出的導通電流，兩者最高有6倍的差異。最後一部分在通道厚度的變異探討，本論文發現電轉換特性如次臨界擺幅在10 nm~20 nm厚度通道的變化有著明顯的變異性。在相同較高參雜濃度之通道經由400 mJ/cm2雷射條件施打下的無接面元件，厚度為10 nm、15 nm及20 nm的元件之次臨界擺幅分別是214.5 mV/dec、366 mV/dec與523 mV/dec，可清楚看到次臨界擺幅隨著厚度增加有明顯裂化趨勢。同時我們也進行無接面元件模擬，其中可發現在較厚的通道有著較差的空乏載子的能力，使得整體元件的轉換特性就有著較差的表現，與實驗趨勢是相當吻合。 在本論文經由雷射退火後的無接面薄膜電晶體之研究中，在較高閘極控制能力的雙閘極的結構下、10 nm厚度的高參雜濃度通道之無接面元件有最佳的特性表現，其特性表現如次臨界擺幅與開關電流比率分別為200 mV/dec及2.18x106。因此在基本的參雜濃度以及通道尺度做精確的調整，以雙閘極的結構達到高效能的無接面元件，對於未來在面板上的三維積體電路的元件整合應用將有著很大的潛力及優勢。

In order to resolve the thermal budget issue, the concept of junctionless filed effect transistors (JLFET) was proposed in recent years. The doping type and doping concentration of the JLFET were the same in source, drain, and channel. Therefore, the thermal diffusion issue didn’t need to be concerned in the JLFET, and the thermal budget issue could be remarkably eliminated. In this thesis, it would briefly introduce the fabrication of double gate JL TFTs with in-situ doped poly-Si depositing technology using excimer laser annealing treatment. The JL TFTs with the double gate structure could obtain the better device performance as well as avoid the difficulty of ultrathin channel fabrication. Furthermore, the characteristics of JL TFTs were investigated via the modulation of channel thicknesses and doping concentrations. In the electrical characteristics results, the comparisons between double gate and single gate JL TFTs would be conducted, the result presented that the double gate JL device with subthreshold swing of 160 mV/dec demonstrated the better performance than the single gate JL device with subthreshold swing of 329 mV/dec. Therefore, it confirmed that the double gate JL devices processed improved gate controllability and performance. In the laser annealing effect, it illustrated that the laser annealing had no significant effect on the electrical characteristics improvements. These results indicated that the laser annealing effect was limited by the ultrathin channels, so that the elimination of grain boundary was not obvious in channel. In addition, it was discovered that the drive currents and on/off ratio would be affected by channel doped concentration. The higher conductive current with 6 times magnification would be obtained as increasing the dopant concentration. Finally, the measurement results illustrated that the transfer characteristics, such as subthreshold swing, were much predominant to the changes of channel thicknesses. The JL devices with highly doped channel thicknesses of 10 nm, 15 nm, and 20 nm through the laser annealing condition of 400 mJ/cm2 were obtained as subthreshold swing of 214.5 mV/dec, 366 mV/dec, and 523 mV/dec, respectively. It implied that the degradation of subthreshold swing was obtained as increasing the channel thickness. In the simulation results, it indicated the JL devices with thicker channel thickness had the worse capability of charge depletion, so that the devices with thicker channel thickness performed worse transfer performance. In summary, the JL TFTs with double gate structure and highly doped channel thickness of 10 nm exhibited the optimized characteristics through excimer laser annealing, and the best performance of the JL TFTs was obtained as subthreshold swing of 200 mV/dec and on/off ratio of 2.18x106 in this work. Consequently, to achieve the high performance JL devices, the doping concentrations and channel dimensions must be precisely modulated, and the high performance JL TFTs with the double gate structure demonstrated the future potential applications in three dimensional integral circuit (3-D IC).