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dc.contributor.author賴冠婷en_US
dc.contributor.authorLai, Kuan-Tingen_US
dc.contributor.author胡樹一en_US
dc.contributor.authorHu,Shu-Ien_US
dc.date.accessioned2014-12-12T02:39:42Z-
dc.date.available2014-12-12T02:39:42Z-
dc.date.issued2013en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT070050146en_US
dc.identifier.urihttp://hdl.handle.net/11536/74076-
dc.description.abstract此論文將提出兩個在CMOS以及一個在GaAs製程下設計的電路,包括CMOS製程的77兆赫90奈米窄頻功率放大器、77-110 兆赫65奈米寬頻功率放大器以及三五族製程的0.1微米77兆赫窄頻功率放大器。 CMOS 90奈米功率放大器具有四級放大級且為一分二分四分八的架構,在輸出端會有一個八路合一的同相位功率合成器;65奈米功率放大器由一分二分四的三級放大級架構組成。第一級放大集由兩個電晶體組成,輸出端由四路合一的同相位功率合成器組成。三五族製程的77兆赫窄頻功率放大器有三級放大級,架構是一分二分四。輸入端由一段偶合線取代常用的DC阻隔電容,輸出端也是由四路合一的同相位功率合成器組成。 所有的設計流程與電路的特性都會在接下來的論文中被清楚的說明與討論。zh_TW
dc.description.abstractThe thesis will propose three circuits which are designed in CMOS and GaAs technology, including a 90nm 77 GHz narrow band, a 65nm 77-110 GHz wide band Power Amplifier and a 0.1 um GaAs 77 GHz narrowband power amplifier. The 90nm CMOS 77 GHz narrow band amplifier has four stages with 1:2:4:8 configuration and a eight-way in-phased combiner at the output stage. There are three stages with 1:2:4 configuration and a four-way in-phased combiner at the output stage in the 65nm CMOS 77-110 GHz wideband amplifier. The 0.1 um GaAs 77 GHz narrow band power amplifier has three stages with 1:2:4 configuration. The input DC-blocking is used by a couple line instead of a capacitance, and the output stage is used a four-way in-phased combiner. The design approach and the behavior of these circuits will be well discussed and clearly illustrated.en_US
dc.language.isoen_USen_US
dc.subject毫米波zh_TW
dc.subject功率放大器zh_TW
dc.subject功率合成zh_TW
dc.subjectMillimeter-waveen_US
dc.subjectpower amplifieren_US
dc.subjectpower combiningen_US
dc.title毫米波CMOS及GaAs功率放大器zh_TW
dc.titleMillimeter-Wave CMOS and GaAs Power Amplifier Designen_US
dc.typeThesisen_US
dc.contributor.department電子工程學系 電子研究所zh_TW
Appears in Collections:Thesis