完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Wu, CY | en_US |
dc.contributor.author | Hsiao, SY | en_US |
dc.date.accessioned | 2014-12-08T15:02:01Z | - |
dc.date.available | 2014-12-08T15:02:01Z | - |
dc.date.issued | 1997-02-01 | en_US |
dc.identifier.issn | 0018-9200 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/4.551907 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/740 | - |
dc.description.abstract | A new bandpass amplifier which performs both functions of low-noise amplifier (LNA) and bandpass filter (BPF) is proposed for the application of 900-MHz RF front-end in wireless receivers, In the proposed amplifier, the positive-feedback Q-enhancement technique is used to overcome the low-gain low-Q characteristics of the CMOS tuned amplifier, The Miller capacitance tuning scheme is used to compensate for the process variations of center frequency, Using the high-Q bandpass amplifier in the receivers, the conventional bulky off-chip filter is not required, An experimental chip fabricated by 0.8-mu m N-well double-poly-double-metal CMOS technology occupies 2.6 x 2.0 mm(2) chip area, Under a 3 V supply voltage, the measured quality factor is tunable between 2.2 and 44. When the quality factor is tuned at Q = 30, the measured center frequency of the amplifier is tunable between 869-893 MHz with power gain 17 dB, noise figure 6.0 dB, output 1 dB compression point at -30 dBm, third-order input intercept point at -14 dBm, and power dissipation 78 mW. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | bandpass amplifier | en_US |
dc.subject | bandpass filter | en_US |
dc.subject | CMOS technology | en_US |
dc.subject | integrated inductor | en_US |
dc.subject | low-noise amplifier | en_US |
dc.subject | mobile communication | en_US |
dc.subject | radio frequency | en_US |
dc.subject | wireless receiver | en_US |
dc.title | The design of a 3-V 900-MHz CMOS bandpass amplifier | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/4.551907 | en_US |
dc.identifier.journal | IEEE JOURNAL OF SOLID-STATE CIRCUITS | en_US |
dc.citation.volume | 32 | en_US |
dc.citation.issue | 2 | en_US |
dc.citation.spage | 159 | en_US |
dc.citation.epage | 168 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:A1997WE53900003 | - |
dc.citation.woscount | 46 | - |
顯示於類別: | 期刊論文 |