完整後設資料紀錄
DC 欄位語言
dc.contributor.author高郁琪en_US
dc.contributor.authorKao, Yu-Chien_US
dc.contributor.author張錫嘉en_US
dc.contributor.authorChang, Hsie-Chiaen_US
dc.date.accessioned2014-12-12T02:44:30Z-
dc.date.available2014-12-12T02:44:30Z-
dc.date.issued2014en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT070150212en_US
dc.identifier.urihttp://hdl.handle.net/11536/75951-
dc.description.abstract  在本篇論文中,我們提出了一個電容及電阻感測的廣用型感測平台。這個電路能將輸入的差動電容及電阻轉成數位輸出。根據感測器的應用,我們在晶片上實作了四種感測器,分別為一組電容式感測電路、兩種不同應用範圍的電阻式感測電路,以及一個偵測晶片溫度的感測器。為了解決電容及電阻不匹配造成的輸出偏移,我們提出了一個自動補償的電路。另外,我們也提出了一個利用取比例關係的方法,降低因製程、電壓、溫度 (P-V-T) 所造成的變異。除此之外,在電路的設計上,硬體共用及事件驅動的設計概念,讓整個電路在功耗和晶片面積上有更高的效率。   我們使用台積電0.35µm CMOS製程,電路量測結果顯示我們的電容感測電路有很高的解析度0.39 fF,FoM為0.66 pJ/step。在電阻感測的部分,當應用於解析度低、感測範圍大時的功率消耗很低,得到FoM為10.1 pJ/step;而另一種針對高解析度的電阻感測電路則有很高的解析度5.2 Ω。在這個電路中,每一個感測電路的解析度及感測範圍都是可調整的。當四種感測器同時運作在轉換時間為1 ms時,供電電壓為3.3 V,整個電路的功率消耗只有0.190 mW。在我們的電路中,我們的解析度及功率優於其他許多相關的設計,而這樣的設計非常適合應用於生物感測系統。zh_TW
dc.description.abstractWe proposed and fabricated a general purpose capacitive and resistive sensing readout platform. The system converts the input capacitance and resistance differences into digital output codes. According to the sensing mechanism, there are four sensors in our chip design. A capacitive sensing circuit, two resistive sensing circuits for different applications, and a resistive sensor for die’s temperature detection are implemented. In order to compensate the initial mismatches for both capacitance and resistance, the auto-trimming circuit is proposed. The pulse proportion generation (PPG) technique is utilized to minimize the PVT variations. Due to the hardware-sharing and event-driven design, the system itself is power/area efficient. The chip is fabricated in TSMC 0.35 μm process. Measurement results show that our capacitive sensing circuit achieves high resolution of 0.39 fF, with the FoM of 0.66 pJ/step. For the resistive sensing, low power consumption for wide sensing range gives the FoM of 10.01 pJ/step, and another type for high resolution sensing achieves an ultra-high resolution of 5.2 Ω. The sensing resolution in each sensor is adjustable, and therefore the trimming resolution is adjustable. Under the conversion time of 1 ms, four sensors operating simultaneously will consume as low as 0.190 mW with the supply voltage of 3.3 V. It should be emphasized that our resolution and power-efficiency is superior to lots of publications reported before. And this design is a strong candidate for bio-sensing integrated system in the future.en_US
dc.language.isoen_USen_US
dc.subject電容式感測zh_TW
dc.subjectCapacitive Sensingen_US
dc.subjectResistive Sensingen_US
dc.title應用於高解析度高能量效率之廣用型感測平台zh_TW
dc.titleA General Purpose Sensing Platform for High Resolution/ Energy-Efficiency Applicationsen_US
dc.typeThesisen_US
dc.contributor.department電子工程學系 電子研究所zh_TW
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