完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Kuo, Po-Yi | en_US |
dc.contributor.author | Chao, Tien-Sheng | en_US |
dc.contributor.author | Lai, Jiou-Teng | en_US |
dc.contributor.author | Lei, Tan-Fu | en_US |
dc.date.accessioned | 2014-12-08T15:09:57Z | - |
dc.date.available | 2014-12-08T15:09:57Z | - |
dc.date.issued | 2009-03-01 | en_US |
dc.identifier.issn | 0741-3106 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/LED.2008.2011146 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/7602 | - |
dc.description.abstract | We have successfully developed and fabricated the vertical n-channel polycrystalline silicon thin-film transistors with symmetric S/D fabricated by Ni-silicide-induced lateral-crystallization technology (NSILC-VTFTs). The NSILC-VTFTs are S/D symmetric devices and equivalent to dual-gate devices. The dualgate structure of NSILC-VTFTs can moderate the lateral electrical field in the drain depletion region, significantly reducing the leakage current. In NSILC-VTFTs, the Ni accumulation and grain boundaries induced from S/D sides can be centralized in the n(+) floating region. The. effects of Ni accumulation in symmetric VTFTs crystallized by NSILC and metal-induced lateral crystallization are studied. In addition, a two-step lateral crystallization has been introduced to improve the crystal integrity through secondary crystallization. The NSILC-VTFTs crystallized by two-step lateral crystallization show a steep subthreshold swing of 180 mV/dec and field effect mobility mu = 553 cm(2)/V . s without NH(3) plasma treatment. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Dual gate | en_US |
dc.subject | n(+) floating region | en_US |
dc.subject | Ni-silicide-induced lateral crystallization (NSILC) | en_US |
dc.subject | polycrystalline silicon thin-film transistors (poly-Si TFTs) | en_US |
dc.subject | symmetric S/D | en_US |
dc.subject | vertical channel | en_US |
dc.title | Vertical n-Channel Poly-Si Thin-Film Transistors With Symmetric S/D Fabricated by Ni-Silicide-Induced Lateral-Crystallization Technology | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/LED.2008.2011146 | en_US |
dc.identifier.journal | IEEE ELECTRON DEVICE LETTERS | en_US |
dc.citation.volume | 30 | en_US |
dc.citation.issue | 3 | en_US |
dc.citation.spage | 237 | en_US |
dc.citation.epage | 239 | en_US |
dc.contributor.department | 電子物理學系 | zh_TW |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electrophysics | en_US |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000263920400012 | - |
dc.citation.woscount | 2 | - |
顯示於類別: | 期刊論文 |