自我調式記憶體位址分配以增進記憶體能源效率

Abstract

傳統靜態的記憶體位址分配可能會導致記憶體傾向低效率的使用造成不必要的功耗。排程時常可以幫助記憶體減少功率消耗，不過仍然很難避免記憶體可以長時間的維持在低功耗/睡眠模式。 本篇研究，我們提出了一個自我調式記憶體位址分配以避免存取於高使用率的bank並且透過監視器依據工作量動態的配置記憶體位址在合適的rank上。隨著記憶體上的流量配置歪斜，我們更有機會使用self-refresh模式來降低功耗。我們的實驗數據顯示我們所提出來的SAMS-WD與SAMS-SR與傳統的記憶體比較，分別可降低功耗6.1% 和 14.8%，對於系統效能影響分別約1%和1.8%。

The static address mapping schemes used in conventional memory systems may lead to poor utilization of DRAM and cause unnecessary power consumption. Scheduling often helps to reduce background power consumption, yet it is still difficult to allow long periods where DRAM can remain in power down/sleep mode. In this thesis, we propose a self-adpative mapping scheme to avoid access requests to the bank under high utilization and dynamically allocating pages to apposite ranks based on the workload behavior provided, as determined by a monitor. As memory traffic is being skewed, we applied Self-refresh mode into our mechanism to further reduce power consumption. Our experimental results show that our mechanism SAMS-WD and SAMS-SR can reduce power consumption by 6.1% with around 1% of latency and 14.8% with 1.8% of latency repectively in comparison to the conventional memory mapping scheme.