具前景式自我校正功能之十四位元每秒兩億次取樣電流導向式數位類比轉換器設計

Abstract

近年來，具有高速高解析的數位類比轉換器(digital-to-analog converters,DACs)在廣泛的應用中是個不可或缺的架構之一，包括在直接頻率合成器、任意波形產生器、視頻顯示器、通訊發射端等方面均有使用。基於高速應用的考量，我們採用了電流導向式(current-steering)的架構，因其速度快慢是受限於輸出端而非電路內部，所以此結構會有利於高速操作。至於在高解析度方面，為滿足高度匹配特性，在電流源的設計上我們必須透過付出較大的面積作為交換。可是當電流源的面積太大的時候，將會產生更多的本質電容與雜散電容，導致其輸入頻寬的下降。若想要改善此現象，便只有透過縮小電流源尺寸這唯一的途徑。然而，如此作法又會牴觸至匹配條件，讓其引起更嚴重的匹配誤差。故此，本論文實現一個全數位化的前景式校正技術來確保在小電流源尺寸之下能夠保有的一定的精準度。

為驗證所使用的前景式校正演算法，本論文實現一個十四位元數位類比轉換器，使用於九十奈米金氧半場效電晶體，且待校正的電流源面積只有理論值的一百一十六分之一。晶片有效面積為一千一百一十乘上八百三十微米平方。從電路模擬結果顯示，當在MSB電流源中加上百分之三點六五的電流誤差，經過校正之後，可以在訊號對雜訊及失真比(signal-to-noise and distortion ratio,SNDR)與無雜散動態範圍(spurious-free dynamic range,SFDR)上分別有著三十分貝與四十分貝的提升，此結果意味著本論文所實現的前景式校正技術能大幅減低因電流源間的不匹配特性而造成的非線性誤差。

In recent years, high-speed; high-resolution digital-to-analog converters(DACs) become an essential element for direct frequency synthesizers, arbitrary wave generators, multimedia displays and communications transmitters. For high-speed applications, we adopt the current-steering structure; since its operation speed is mainly limited by output loadings and thus high sampling speed can be achieved. As to the design of high-accuracy current-steering DACs, current sources with high matching property are required and occupy a large area. Such a large area results in more intrinsic and parasitic capacitor loadings, and also degrades the signal bandwidth. In order to reduce loading, the most common way is using compact current cells. Therefore, foreground calibration performed in the digital domain is presented in this thesis to correct the current mismatches caused by small dimension of the current source.

To verify the presented foreground calibration algorithm, a 14-bit 200Ms/s DAC has been fabricated in 90-nm CMOS technology. The area of under-calibrated current sources is 1/116 of the required area which is designed for 14-bit resolution. The active area is 1110 by 830 um^{2} . Simulation results show that the calibrated current-steering DAC achieves improvements in the SNDR and the SFDR by 30dB and 40dB respectively when 3.65% random errors are added to the current sources of most significant bit(MSB).