矽製程蕭特基二極體尺寸最佳化以及應用60GHz蕭特基二極體次諧波混頻器之SiGe BiCMOS 5/60GHz接收機

Abstract

本篇論文分為兩部分，第一部分析CMOS與SiGe BiCMOS蕭特基二極體，第二部分是SiGe BiCMOS 5/60GHz接收機。 在第二章說明TSMC CMOS 0.18μm以及SiGe BiCMOS 0.18μm不同製程製造矽蕭特基二極體，亦提及接面電容、串聯電阻與截止頻率的萃取，也探討不同布局下的影響。 第三章介紹SiGe BiCMOS製程之使用60GHz雙降頻接收機與5GHz直接降頻器的5/60 GHz雙模態接收機。60GHz雙降頻接收機包含SiGe蕭特基二極體與微縮化的鼠競環次諧波混頻器。另一方面高Q值的RF通道選擇器使用於5 GHz直接降頻接收機中，得到窄頻中頻。而且5GHz與60GHz接收機連接至相同的可切換中頻之吉爾伯特混頻器。

This thesis consists of two parts. The first part analyzes Schottky diodes in CMOS and SiGe BiCMOS. The second part is a SiGe BiCMOS 5/60 GHz receiver. In Chapter 2, Silicon Schottky diodes are fabricated in the TSMC CMOS and SiGe BiCMOS 0.18μm process. The extractions of junction capacitance, series resistance and cut-off frequency are demonstrated in this thesis. The effect of different layout would be discussed in this chapter. Chapter 3 describes a 5/60 GHz receiver constructed of a 60-GHz dual-conversion down-converter and a 5-GHz direct-conversion receiver in 0.18 m SiGe BiCMOS. The 60GHz dual-conversion down-converter consists of a SiGe Schottky diode sub-harmonic mixer with a minimized rat-race coupler. On the other hand, the high-Q RF channel-select bandpass filter is employed in the 5GHz direct-conversion receiver to obtain narrow IF bandwidth. Moreover, both 5GHz and 60GHz receivers are connected to same switchable IF2 Gilbert mixer.