矽鍺異質接面雙極性電晶體小訊號模型建立及特性化應用

Abstract

本論文的研究方向為：對於目前應用於單石微波積體電路中之矽鍺異質接面雙極性電晶體（SiGe HBTs），進行其小訊號模型參數之萃取，及應用參數萃取結果在分析電晶體S參數中的非正常凹陷現象（Anomalous Dip），並對電晶體之電流雜訊源萃取方法做一有系統的探討。因此本論文分為二大部分來進行探討：第一部分為首先考量矽鍺異質接面雙極性電晶體與傳統三五族異質接面雙極性電晶體（III-V HBTs）本質等效電路上的相似，先針對無基板效應（Substrate Effect）之三五族異質接面雙極性電晶體小訊號等效電路（Small-Signal Equivalent Circuit），推導出傳統本質電路中集總元件的封閉表示式，利用推導得之封閉表示式提出一個新穎的小訊號模型參數萃取方法，該方法主要利用如果小訊號等效電路成立時，所萃取得到的等效電路參數值應為一個與頻率無關的函數，利用這關係作為最佳化的條件，計算外質參數及接下來的本質參數，最後得到良好的模型結果。 接著將所推導之封閉表示式應用在矽鍺異質接面雙極性電晶體小訊號模型參數萃取上，我們發現並非能夠貼切的適用，推測為矽鍺異質接面雙極性電晶體有較複雜的外質等效電路，比如會造成部分訊號漏失的導電性基板。傳統方法在萃取基板網路（Substrate Network）參數時，常常由所量得的Y22 + Y21來著手，但我們的研究發現，利用Y22 + Y21的頻率關係來萃取基板參數時，基板網路的電導（Addmitance）會被低估而基板網路的電納（Suspectance）則會被高估，另外傳統基板網路參數萃取方法在萃取大尺寸元件基板網路參數時會得到負值基板等效電阻，以上的非理想效應皆因忽略部份信號會經由本質參數對基板網路做回授的影響，因此本論文中提出一個新的基板網路參數萃取方法，在萃取基板網路參數時考慮了由本質參數所回授的信號，並且由Ysub而非Y22 + Y21萃取基板等效電阻、基板等效電容及基板與集極空乏電容，成功的解決上述的一些非理想效應，所得到的基板網路參數與集極偏壓的關係與傳統方法所得的趨勢相異，經由一個簡單的模型成功的解釋了所萃取得到的基板網路參數與偏壓的關係，在萃取本質參數時，我們捨棄傳統萃取方法中常用的Y參數或Z參數萃取方程式，而改用ABCD參數，並提出一系列的線性迴歸方程式，萃取所有的本質參數，與傳統方法比較起來，比較簡單而且容易建立在使用者的參數萃取軟體中。 利用所萃取得到之小訊號等效集總元件參數值，分析S參數中S12的非正常凹陷現象，我們成功的推導出S12與集總元件間的簡單解析表示式，該表示式能夠解決傳統方法在分析S11及S22所引用的雙回授理論（Dual-Feedback Methodology）不能完美表達S12的缺點，所推導之S12表示式分為輸出阻抗比及回授網路兩部份，將該兩部份做零點及極點近似（Pole Zero Approximation），我們發現非正常凹陷現象是由於回授網路中一個零點與輸出阻抗比中的兩個極點間交互作用所致的結果，分析該零點與小訊號等效電路集總元件間的關係式，成功的解釋了在大基極電流下S12非正常凹陷現象變的更明顯的原因。 本論文第二大部分主要探討矽鍺異質接面雙極性電晶體的本質電流雜訊源萃取技巧，首先我們提出一計算方法，將ATN NP5B量得之資料經由所提出之基因演算法（Genetic Algorithm），計算得元件在該偏壓下的四雜訊參數，與傳統方法做比較，所提出之方法其計算時間與量測所設定的輸入阻抗數目無關。利用計算所得之四雜訊參數，我們提出一套完整的矽鍺異質接面雙極性電晶體本質電流雜訊源的萃取技巧，方法中引用四埠網路去嵌入及四埠雜訊去嵌入的理論，將整個電晶體雜訊源萃取流程簡化為計算四埠Y參數([Yee], [Yei], [Yie], and [Yii])，避免傳統方法使用相關矩陣（Correlation Matrices）轉換程序時的複雜過程，在計算四埠Y參數我們提出了一套簡單完整的計算方法，先定義出四個運算子，基於四埠Y參數的定義交互使用四個運算子，最後簡單的以矩陣型式表示出四埠Y參數，與目前利用電路模擬軟體或測試結構的方法做比較，該方法簡單易懂且容易建立數學軟體中。利用提出的萃取流程，成功萃取出矽鍺異質接面雙極性電晶體的基極電流雜訊源、集極電流雜訊源及兩者間的關連性。

We have developed an extraction method for the small-signal modeling of SiGe HBTs which have been extensively used in monolithic microwave integrated circuits. Applying the small-signal modeling results, we successfully explained the anomalous dip in S-parameters of SiGe HBTs and developed a systematic extraction method for the current noise of SiGe HBTs. The thesis is therefore organized as two major parts. Firstly, to develop the direct extraction method for small-signal modeling of SiGe HBTs, it is better to investigate the small-signal modeling of III-V HBTs first since small-signal modeling of III-V HBTs where the substrate network has negligible effect on the performance is much easier as compared to that of SiGe HBTs. We derived close form representations of intrinsic circuit elements of HBTs and presented a novel approach for parameter determination of HBT small-signal equivalent circuit. Assuming that the equivalent circuit is valid over the interested frequency range of the measurements, the extrinsic elements are determined by minimizing the variance of the intrinsic elements as an optimization criterion. The proposed method leads to a good fit between the measured and calculated S-parameters. Applying the derived close-form representation on the small-signal modeling of SiGe HBTs, we found that the modeling results are not so successful, possibly due to the complicated extrinsic circuit such as the conductive substrate network. Most conventional methods for the extraction of substrate network were based on the use of frequency behavior of Y22 + Y21. However, we found that the feedback signal through the internal circuit elements makes the conductance of the substrate network underestimated while makes the susceptance of the substrate network overestimated. If conventional methods are directly performed on large area SiGe HBTs, a negative effective substrate resistance will be extracted. In the first part of the thesis, a new extraction method for the substrate network parameters of SiGe HBTs is proposed. When extracting the substrate network parameters, the feedback signal through internal circuit elements is considered. All the circuit elements of substrate network are extracted from Ysub instead of Y22 + Y21. The extracted substrate network parameters show a different bias dependence as compared to the conventional methods. By using a simple n+-p junction, we successfully explained the extracted bias dependent substrate network parameters. We developed a series linear regression equation to extracted the intrinsic circuit elements from the ABCD parameters. Compared with the conventional methods which extracted the circuit elements from Y-parameters or Z-parameters, the proposed method is much simple and easy to implement in the computer programs. The extracted small-signal modeling results were applied on the analysis of the anomalous dip of S12. A simple analytical representation of S12 in terms of lumped circuit elements is successfully derived. The derived equation can well represent the frequency behavior as compared to the dual-feedback methodology which is widely used in the analysis of the anomalous dip of S11 and S22. The derived equation is divided into two parts, the output impedance ration and feedback network. Through the pole zero approximation, we found the anomalous dip is caused by the interaction between two poles in the output impedance ration and one zero in the feedback network. Analyzing the relation between the zero and lumped circuit elements, we successfully explained the phenomena that the anomalous dip of S12 is more obvious in large base current. The second part of the thesis is to discuss the extraction technique for the intrinsic current noise of SiGe HBTs. We developed first a computation method for the four noise parameters from the measurement results from ATN NP5B using genetic algorithm. Compared with conventional method, the computer-time of proposed genetic search is independent on the number of measured source impedance Applying the calculated four noise parameters, we develop a complete extraction procedure for the intrinsic current noise of SiGe HBTs. By using the four-port S-parameters de-embedding and noise de-embedding theory, we simplify the problem to simple calculations of four-port Y-parameters ([Yee], [Yei], [Yie], and [Yii]). The proposed procedure prevents the complicated calculation through the use of correlation matrices. Four operands are defined before the calculation of four-port Y-parameters. Their values are calculated through the use of corresponding operands following the definition of the [Yee], [Yei], [Yie], and [Yii]. Finally, the base current noise, collector current noise and their correlation are extracted after removing the noise contribution from extrinsic circuit elements. The proposed four-port Y-parameters calculation method is much simpler and easy to implement in the mathematic program.