DRAM產品晶背矽基材裸露問題改善之探討

Abstract

本研究的主要目標,是為了解決部份DRAM 產品因為晶背產生凹痕,嚴重者露出矽基材導致客戶退貨。DRAM產品多樣化,依線寬不同往往在設計製造流程上也會有所不同。晶片一旦量產後,設計不良的問題便可能一一出現。 本問題的解決方法為先根據受影響晶片其背景資料進行資料分析,整理出共通性。並針對晶片異常位置狀況逐一比對相關機台機械手臂抓晶片的位置,找出比較可能發生問題的機型,再藉由電子顯微鏡及SEM量測出問題薄膜層其前後關係以縮小問題範圍。 針對特定機台改變參數試圖查出其關鍵變異點,並且付費向工研院借量測Boat Pin 粗糙度儀器以便確認推論正確性。 本實驗發現設計者設計某些製造流程步驟有潛在問題會造成晶片外觀異常,甚至嚴重者晶片報廢。 本實驗成果對半導體製造流程技術開發提供非常重要建議,並改善晶片生產良率,對企業貢獻深遠。

The dominate goal of the study is to solve concave problem in wafer backside for some DRAM product. Some serious wafers were scrapped due to damage silicon substrate. The DRAM products with many different type due to often design process flow by different critical dimension. The potential problems of design will appear one after another when mass production. According to running history of impact wafers to analysis & find out common issue. Get robot catch wafer position data of relation machine to correlate with impact wafer pattern, try to find out impact machine type & layers by microscope, SEM measurement tool. We change parameter, try to find out the key point & borrow tool from ERSO to measure boat pin roughness to confirm. We found out there are some problem in design process flow, possible induce wafer abnormal even scrap for seriously in the experiment. We provide very important suggestion at process flow designing in semiconductor. To improve wafer yield, get big contribution in company.