損耗基板之去寄生效應法與射頻金氧半場效電晶體雜訊萃取之應用

Abstract

閘極長度為80與65奈米之奈米級金氧半場效電晶體分別擁有高達100與165GHz的截止頻率。但是根據量測得到的雜訊特性，兩者的最低雜訊指數卻沒有因此而有明顯的差異。當閘極偏壓在對應元件最高截止頻率下操作，在頻率10GHz的最低雜訊指數甚至超過5dB。另外，隨著閘極指叉數目增加其最低雜訊指數大幅減小，與指叉數目有很強的關連。上述現象並無法簡單地用閘極阻值因為指叉數目增加並聯後減少所導致的雜訊減低來完全解釋。因此，提出了元件量測雜訊特性之去寄生雜訊效應的方式，以獲得元件之真實特性。 在本論文中，首先整理金氧半電晶體相關的基本雜訊理論與高頻雜訊量測原理及設備，並討論傳統去寄生雜訊的方式以及其缺點。元件本質特性模型的部分，先透過量測電流-電壓特性、轉導以及導納參數校正元件本質特性模型的參數。接著探討不同的測試元件探針墊片佈局方式對量測特性的影響，根據相對應的探針墊片提出新式等校電路模型及其參數萃取方式並經大量實驗結果驗證後，再將探針墊片的等效電路搭配經過準確校正的元件模型構成完整電路，模擬直接量測到的散射參數以及雜訊參數。最後，將表現出高損耗特性的探針墊片模型從完整電路模型中移除，模擬元件之本質特性，最後根據所得到的元件雜訊參數進行分析及探討。

For sub-100nm MOSFETs with the gate length scaling to 80 nm and 65 nm, the unit current gain cut off frequency (fT) can achieve as high as 100 GHz and 165 GHz, respectively. However, the as-measured noise figure shows no much difference between 80 nm and 65 nm devices. The minimum noise figure (NFmin) is even higher than 5dB at 10GHz under gate bias responsible for the maximum fT. Strong finger number dependence of noise figure was also observed. All the mentioned phenomena can not be simply explained by gate resistance reduction through multi-finger structure. It suggests that noise de-embedding is required for the as-measured noise parameters. In this thesis, the basic noise theory of MOSFET, noise measurement principles and instruments will be covered in the first place. Conventional noise correlation matrix de-embedding method will be reviewed. Regarding the intrinsic MOSFET model, I-V and C-V model calibration have been done based on the measured I-V, transconductance, and admittance by Y-parameters. Then discussion of different probing pad effect on device characterization and the corresponding equivalent circuit model has been established and extensively verified. A new equivalent circuit de-embedding method was proposed. Modeling of as-measured S-parameters and noise parameters was done by incorporating the pad model with a well calibrated MOSEFT model. The lossy pad and lossy substrate de-embedding has been conducted to obtain the intrinsic characteristic. Finally, the intrinsic performance of the device will be analyzed and discussed.